UM8669F clean-up from the temp mess.
This commit is contained in:
@@ -1,321 +0,0 @@
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/*um8669f :
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aa to 108 unlocks
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next 108 write is register select (Cx?)
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data read/write to 109
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55 to 108 locks
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C1
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bit 7 - enable PnP registers
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PnP registers :
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07 - device :
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0 = FDC
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1 = COM1
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2 = COM2
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3 = LPT1
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5 = Game port
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30 - enable
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60/61 - addr
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70 - IRQ
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74 - DMA*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include "86box.h"
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#include "device.h"
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#include "86box_io.h"
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#include "timer.h"
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#include "pci.h"
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#include "lpt.h"
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#include "serial.h"
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#include "fdd.h"
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#include "fdc.h"
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#include "sio.h"
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#define DEV_FDC 0
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#define DEV_COM1 1
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#define DEV_COM2 2
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#define DEV_LPT1 3
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#define DEV_GAME 5
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#define REG_DEVICE 0x07
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#define REG_ENABLE 0x30
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#define REG_ADDRHI 0x60
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#define REG_ADDRLO 0x61
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#define REG_IRQ 0x70
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#define REG_DMA 0x74
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typedef struct um8669f_t
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{
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int locked, cur_reg_108,
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cur_reg, cur_device,
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pnp_active;
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uint8_t regs_108[256];
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struct {
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int enable;
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uint16_t addr;
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int irq;
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int dma;
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} dev[8];
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fdc_t *fdc;
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serial_t *uart[2];
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} um8669f_t;
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static void
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um8669f_pnp_write(uint16_t port, uint8_t val, void *priv)
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{
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um8669f_t *dev = (um8669f_t *) priv;
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uint8_t valxor = 0;
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uint8_t lpt_irq = 0xff;
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if (port == 0x279)
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dev->cur_reg = val;
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else {
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if (dev->cur_reg == REG_DEVICE)
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dev->cur_device = val & 7;
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else {
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switch (dev->cur_reg) {
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case REG_ENABLE:
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valxor = dev->dev[dev->cur_device].enable ^ val;
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dev->dev[dev->cur_device].enable = val;
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break;
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case REG_ADDRLO:
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valxor = (dev->dev[dev->cur_device].addr & 0xff) ^ val;
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dev->dev[dev->cur_device].addr = (dev->dev[dev->cur_device].addr & 0xff00) | val;
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break;
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case REG_ADDRHI:
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valxor = ((dev->dev[dev->cur_device].addr >> 8) & 0xff) ^ val;
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dev->dev[dev->cur_device].addr = (dev->dev[dev->cur_device].addr & 0x00ff) | (val << 8);
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break;
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case REG_IRQ:
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valxor = dev->dev[dev->cur_device].irq ^ val;
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dev->dev[dev->cur_device].irq = val;
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break;
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case REG_DMA:
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valxor = dev->dev[dev->cur_device].dma ^ val;
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dev->dev[dev->cur_device].dma = val;
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break;
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default:
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valxor = 0;
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break;
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}
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switch (dev->cur_device) {
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case DEV_FDC:
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if ((dev->cur_reg == REG_ENABLE) && valxor) {
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fdc_remove(dev->fdc);
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if (dev->dev[DEV_FDC].enable & 1)
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fdc_set_base(dev->fdc, 0x03f0);
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}
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break;
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case DEV_COM1:
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if ((dev->cur_reg == REG_ENABLE) && valxor) {
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serial_remove(dev->uart[0]);
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if (dev->dev[DEV_COM1].enable & 1)
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serial_setup(dev->uart[0], dev->dev[DEV_COM1].addr, dev->dev[DEV_COM1].irq);
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}
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break;
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case DEV_COM2:
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if ((dev->cur_reg == REG_ENABLE) && valxor) {
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serial_remove(dev->uart[1]);
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if (dev->dev[DEV_COM2].enable & 1)
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serial_setup(dev->uart[1], dev->dev[DEV_COM2].addr, dev->dev[DEV_COM2].irq);
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}
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break;
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case DEV_LPT1:
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if ((dev->cur_reg == REG_ENABLE) && valxor) {
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lpt1_remove();
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if (dev->dev[DEV_LPT1].enable & 1)
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lpt1_init(dev->dev[DEV_LPT1].addr);
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}
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if (dev->dev[DEV_LPT1].irq <= 15)
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lpt_irq = dev->dev[DEV_LPT1].irq;
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lpt1_irq(lpt_irq);
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break;
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}
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}
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}
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}
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static uint8_t
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um8669f_pnp_read(uint16_t port, void *priv)
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{
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um8669f_t *dev = (um8669f_t *) priv;
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uint8_t ret = 0xff;
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switch (dev->cur_reg) {
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case REG_DEVICE:
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ret = dev->cur_device;
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break;
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case REG_ENABLE:
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ret = dev->dev[dev->cur_device].enable;
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break;
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case REG_ADDRLO:
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ret = dev->dev[dev->cur_device].addr & 0xff;
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break;
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case REG_ADDRHI:
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ret = dev->dev[dev->cur_device].addr >> 8;
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break;
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case REG_IRQ:
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ret = dev->dev[dev->cur_device].irq;
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break;
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case REG_DMA:
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ret = dev->dev[dev->cur_device].dma;
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break;
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}
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return ret;
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}
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void um8669f_write(uint16_t port, uint8_t val, void *priv)
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{
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um8669f_t *dev = (um8669f_t *) priv;
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int new_pnp_active;
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if (dev->locked) {
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if ((port == 0x108) && (val == 0xaa))
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dev->locked = 0;
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} else {
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if (port == 0x108) {
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if (val == 0x55)
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dev->locked = 1;
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else
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dev->cur_reg_108 = val;
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} else {
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dev->regs_108[dev->cur_reg_108] = val;
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if (dev->cur_reg_108 == 0xc1) {
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new_pnp_active = !!(dev->regs_108[0xc1] & 0x80);
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if (new_pnp_active != dev->pnp_active) {
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if (new_pnp_active) {
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io_sethandler(0x0279, 0x0001,
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NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
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io_sethandler(0x0a79, 0x0001,
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NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
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io_sethandler(0x03e3, 0x0001,
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um8669f_pnp_read, NULL, NULL, NULL, NULL, NULL, dev);
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} else {
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io_removehandler(0x0279, 0x0001,
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NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
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io_removehandler(0x0a79, 0x0001,
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NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
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io_removehandler(0x03e3, 0x0001,
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um8669f_pnp_read, NULL, NULL, NULL, NULL, NULL, dev);
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}
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dev->pnp_active = new_pnp_active;
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}
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}
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}
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}
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}
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uint8_t um8669f_read(uint16_t port, void *priv)
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{
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um8669f_t *dev = (um8669f_t *) priv;
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uint8_t ret = 0xff;
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if (!dev->locked) {
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if (port == 0x108)
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ret = dev->cur_reg_108; /* ??? */
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else
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ret = dev->regs_108[dev->cur_reg_108];
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}
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return ret;
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}
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void
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um8669f_reset(um8669f_t *dev)
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{
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fdc_reset(dev->fdc);
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serial_remove(dev->uart[0]);
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serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
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serial_remove(dev->uart[1]);
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serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
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lpt1_remove();
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lpt1_init(0x378);
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if (dev->pnp_active) {
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io_removehandler(0x0279, 0x0001, NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
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io_removehandler(0x0a79, 0x0001, NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
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io_removehandler(0x03e3, 0x0001, um8669f_pnp_read, NULL, NULL, NULL, NULL, NULL, dev);
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dev->pnp_active = 0;
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}
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dev->locked = 1;
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dev->dev[DEV_FDC].enable = 1;
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dev->dev[DEV_FDC].addr = 0x03f0;
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dev->dev[DEV_FDC].irq = 6;
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dev->dev[DEV_FDC].dma = 2;
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dev->dev[DEV_COM1].enable = 1;
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dev->dev[DEV_COM1].addr = 0x03f8;
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dev->dev[DEV_COM1].irq = 4;
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dev->dev[DEV_COM2].enable = 1;
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dev->dev[DEV_COM2].addr = 0x02f8;
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dev->dev[DEV_COM2].irq = 3;
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dev->dev[DEV_LPT1].enable = 1;
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dev->dev[DEV_LPT1].addr = 0x0378;
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dev->dev[DEV_LPT1].irq = 7;
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}
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static void
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um8669f_close(void *priv)
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{
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um8669f_t *dev = (um8669f_t *) priv;
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free(dev);
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}
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static void *
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um8669f_init(const device_t *info)
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{
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um8669f_t *dev = (um8669f_t *) malloc(sizeof(um8669f_t));
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memset(dev, 0, sizeof(um8669f_t));
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dev->fdc = device_add(&fdc_at_device);
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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io_sethandler(0x0108, 0x0002,
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um8669f_read, NULL, NULL, um8669f_write, NULL, NULL, dev);
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um8669f_reset(dev);
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return dev;
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}
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const device_t um8669f_device = {
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"UMC UM8669F Super I/O",
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0,
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0,
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um8669f_init, um8669f_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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@@ -80,8 +80,6 @@ um8669f_pnp_write(uint16_t port, uint8_t val, void *priv)
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uint8_t valxor = 0;
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uint8_t lpt_irq = 0xff;
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pclog("Write %02X at %04X\n", val, port);
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if (port == 0x279)
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dev->cur_reg = val;
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else {
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@@ -189,8 +187,6 @@ um8669f_write(uint16_t port, uint8_t val, void *priv)
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um8669f_t *dev = (um8669f_t *) priv;
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int new_pnp_active;
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pclog("Write %02X at %04X\n", val, port);
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if (dev->locked) {
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if ((port == 0x108) && (val == 0xaa))
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dev->locked = 0;
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@@ -297,20 +293,6 @@ um8669f_close(void *priv)
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}
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void
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um8669f_detect_write(uint16_t port, uint8_t val, void *priv)
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{
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pclog("Write %02X at %04X\n", val, port);
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}
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uint8_t
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um8669f_detect_read(uint16_t port, void *priv)
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{
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return 0xff;
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}
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static void *
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um8669f_init(const device_t *info)
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{
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@@ -325,15 +307,6 @@ um8669f_init(const device_t *info)
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io_sethandler(0x0108, 0x0002,
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um8669f_read, NULL, NULL, um8669f_write, NULL, NULL, dev);
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io_sethandler(0x0370, 0x0002,
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um8669f_detect_read, NULL, NULL, um8669f_detect_write, NULL, NULL, dev);
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io_sethandler(0x03bd, 0x0001,
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um8669f_detect_read, NULL, NULL, um8669f_detect_write, NULL, NULL, dev);
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io_sethandler(0x03bf, 0x0001,
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um8669f_detect_read, NULL, NULL, um8669f_detect_write, NULL, NULL, dev);
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io_sethandler(0x03f0, 0x0002,
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um8669f_detect_read, NULL, NULL, um8669f_detect_write, NULL, NULL, dev);
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um8669f_reset(dev);
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return dev;
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