SST flash fixes - the implementation of the 29EE0*0 is now correct (BIOS flashers and CIH work).
This commit is contained in:
196
src/sst_flash.c
196
src/sst_flash.c
@@ -34,18 +34,20 @@
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typedef struct sst_t
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{
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uint8_t id, is_39, page_bytes, pad;
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uint8_t id, is_39, page_bytes, sdp;
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int command_state, id_mode,
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erase, dirty;
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dirty;
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uint32_t size, mask;
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uint32_t size, mask,
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page_mask, page_base;
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uint8_t page_buffer[128];
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uint8_t *array;
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mem_mapping_t mapping[8], mapping_h[8];
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pc_timer_t page_load_timer;
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pc_timer_t page_write_timer;
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} sst_t;
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@@ -53,6 +55,7 @@ static wchar_t flash_path[1024];
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#define SST_CHIP_ERASE 0x10 /* Both 29 and 39, 6th cycle */
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#define SST_SDP_DISABLE 0x20 /* Only 29, Software data protect disable and write - treat as write */
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#define SST_SECTOR_ERASE 0x30 /* Only 39, 6th cycle */
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#define SST_SET_ID_MODE_ALT 0x60 /* Only 29, 6th cycle */
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#define SST_ERASE 0x80 /* Both 29 and 39 */
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@@ -74,63 +77,82 @@ static wchar_t flash_path[1024];
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static void
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sst_new_command(sst_t *dev, uint8_t val)
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sst_sector_erase(sst_t *dev, uint32_t addr)
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{
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switch (val) {
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memset(&dev->array[addr & (dev->mask & ~0xfff)], 0xff, 4096);
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dev->dirty = 1;
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}
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static void
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sst_new_command(sst_t *dev, uint32_t addr, uint8_t val)
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{
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if (dev->command_state == 5) switch (val) {
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case SST_CHIP_ERASE:
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if (dev->erase)
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memset(dev->array, 0xff, 0x20000);
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memset(dev->array, 0xff, 0x20000);
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dev->command_state = 0;
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dev->erase = 0;
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break;
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case SST_ERASE:
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case SST_SDP_DISABLE:
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if (!dev->is_39)
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dev->sdp = 0;
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dev->command_state = 0;
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dev->erase = 1;
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break;
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case SST_SET_ID_MODE:
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if (!dev->id_mode)
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dev->id_mode = 1;
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case SST_SECTOR_ERASE:
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if (dev->is_39)
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sst_sector_erase(dev, addr);
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dev->command_state = 0;
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dev->erase = 0;
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break;
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case SST_SET_ID_MODE_ALT:
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if (!dev->is_39 && dev->erase && !dev->id_mode)
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dev->id_mode = 1;
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dev->id_mode = 1;
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dev->command_state = 0;
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dev->erase = 0;
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break;
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case SST_BYTE_PROGRAM:
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dev->command_state = 3;
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if (!dev->is_39) {
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dev->page_bytes = 0;
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timer_set_delay_u64(&dev->page_load_timer, 100 * TIMER_USEC);
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}
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dev->erase = 0;
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break;
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case SST_CLEAR_ID_MODE:
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if (dev->id_mode)
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dev->id_mode = 0;
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dev->command_state = 0;
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dev->erase = 0;
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break;
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default:
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dev->command_state = 0;
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dev->erase = 0;
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break;
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} else switch (val) {
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case SST_ERASE:
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dev->command_state = 3;
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break;
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case SST_SET_ID_MODE:
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dev->id_mode = 1;
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dev->command_state = 0;
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break;
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case SST_BYTE_PROGRAM:
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if (!dev->is_39) {
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memset(dev->page_buffer, 0xff, 128);
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dev->page_bytes = 0;
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timer_on_auto(&dev->page_write_timer, 210.0);
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}
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dev->command_state = 6;
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break;
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case SST_CLEAR_ID_MODE:
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dev->id_mode = 0;
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dev->command_state = 0;
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break;
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default:
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dev->command_state = 0;
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break;
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}
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}
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static void
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sst_sector_erase(sst_t *dev, uint32_t addr)
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sst_page_write(void *priv)
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{
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memset(&dev->array[addr & (dev->mask & ~0xfff)], 0xff, 4096);
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sst_t *dev = (sst_t *) priv;
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memcpy(&(dev->array[dev->page_base]), dev->page_buffer, 128);
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dev->dirty = 1;
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dev->page_bytes = 0;
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dev->command_state = 0;
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}
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@@ -148,6 +170,19 @@ sst_read_id(uint32_t addr, void *p)
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}
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static void
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sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val)
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{
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dev->page_buffer[addr & 0x0000007f] = val;
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timer_disable(&dev->page_write_timer);
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dev->page_bytes++;
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if (dev->page_bytes >= 128)
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sst_page_write(dev);
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else
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timer_set_delay_u64(&dev->page_write_timer, 210 * TIMER_USEC);
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}
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static void
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sst_write(uint32_t addr, uint8_t val, void *p)
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{
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@@ -155,44 +190,55 @@ sst_write(uint32_t addr, uint8_t val, void *p)
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switch (dev->command_state) {
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case 0:
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/* 1st Bus Write Cycle */
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if ((val == 0xf0) && dev->is_39) {
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case 3:
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/* 1st and 4th Bus Write Cycle */
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if ((val == 0xf0) && dev->is_39 && (dev->command_state == 0)) {
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if (dev->id_mode)
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dev->id_mode = 0;
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} else if ((addr & 0xffff) == 0x5555 && val == 0xaa)
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dev->command_state = 1;
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else
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dev->command_state = 0;
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} else if (((addr & 0x7fff) == 0x5555) && (val == 0xaa))
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dev->command_state++;
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else {
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if (!dev->is_39 && !dev->sdp && (dev->command_state == 0)) {
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/* 29 series, software data protection off, start loading the page. */
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dev->page_base = addr & dev->page_mask; /* First byte, A7 onwards of its address are the page mask. */
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dev->command_state = 7;
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sst_buf_write(dev, addr, val);
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}
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dev->command_state = 0;
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}
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break;
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case 1:
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/* 2nd Bus Write Cycle */
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if ((addr & 0xffff) == 0x2aaa && val == 0x55)
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dev->command_state = 2;
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case 4:
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/* 2nd and 5th Bus Write Cycle */
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if (((addr & 0x7fff) == 0x2aaa) && (val == 0x55))
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dev->command_state++;
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else
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dev->command_state = 0;
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break;
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case 2:
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/* 3rd Bus Write Cycle */
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if ((addr & 0xffff) == 0x5555)
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sst_new_command(dev, val);
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else if (dev->is_39 && (val == SST_SECTOR_ERASE) && dev->erase) {
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sst_sector_erase(dev, addr);
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dev->command_state = 0;
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} else
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case 5:
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/* 3rd and 6th Bus Write Cycle */
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if ((addr & 0x7fff) == 0x5555)
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sst_new_command(dev, addr, val);
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else
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dev->command_state = 0;
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break;
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case 3:
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dev->array[addr & dev->mask] = val;
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if (!dev->is_39) {
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timer_disable(&dev->page_load_timer);
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if (dev->page_bytes == 0)
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timer_set_delay_u64(&dev->page_load_timer, 100 * TIMER_USEC);
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else
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timer_set_delay_u64(&dev->page_load_timer, 200 * TIMER_USEC);
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dev->page_bytes++;
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} else
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case 6:
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/* Page Load Cycle (29) / Data Write Cycle (39SF) */
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if (dev->is_39) {
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dev->array[addr & dev->mask] = val;
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dev->command_state = 0;
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dev->dirty = 1;
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dev->dirty = 1;
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} else {
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dev->page_base = addr & dev->page_mask; /* First byte, A7 onwards of its address are the page mask. */
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dev->command_state++;
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sst_buf_write(dev, addr, val);
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}
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break;
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case 7:
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if (!dev->is_39 && ((addr & dev->page_mask) == dev->page_base))
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sst_buf_write(dev, addr, val);
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break;
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}
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}
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@@ -255,15 +301,6 @@ sst_readl(uint32_t addr, void *p)
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}
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static void
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sst_page_load(void *priv)
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{
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sst_t *dev = (sst_t *) priv;
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dev->command_state = 0;
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}
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static void
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sst_add_mappings(sst_t *dev)
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{
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@@ -331,6 +368,8 @@ sst_init(const device_t *info)
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else
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dev->size = 0x20000;
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dev->mask = dev->size - 1;
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dev->page_mask = dev->mask & 0xffffff80; /* Filter out A0-A6. */
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dev->sdp = 1;
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sst_add_mappings(dev);
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@@ -339,13 +378,14 @@ sst_init(const device_t *info)
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if (fread(&(dev->array[0x00000]), 1, dev->size, f) != dev->size)
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fatal("Less than %i bytes read from the SST Flash ROM file\n", dev->size);
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fclose(f);
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}
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} else
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dev->dirty = 1; /* It is by definition dirty on creation. */
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free(flash_name);
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free(machine_name);
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if (!dev->is_39)
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timer_add(&dev->page_load_timer, sst_page_load, dev, 0);
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timer_add(&dev->page_write_timer, sst_page_write, dev, 0);
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return dev;
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}
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@@ -357,9 +397,11 @@ sst_close(void *p)
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FILE *f;
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sst_t *dev = (sst_t *)p;
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f = nvr_fopen(flash_path, L"wb");
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fwrite(&(dev->array[0x00000]), dev->size, 1, f);
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fclose(f);
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if (dev->dirty) {
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f = nvr_fopen(flash_path, L"wb");
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fwrite(&(dev->array[0x00000]), dev->size, 1, f);
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fclose(f);
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}
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free(dev->array);
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dev->array = NULL;
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