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Small fixes to W83781D and SPD

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This commit is contained in:
RichardG867
2020-03-29 19:32:37 -03:00
parent 96f451e92a
commit 44f293a509
2 changed files with 4 additions and 3 deletions
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6
src/hwm_w83781d.c
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@@ -427,7 +427,7 @@ w83781d_reset(w83781d_t *dev, uint8_t initialization)
* AS99127F Rev. 2 on a P4B motherboard, and they seem to work well enough.
*/
if (dev->local & W83781D_AS99127F) {
dev->regs[0x00] = 0xB8; /* might be connected to IN2 Low Limit in some way */
/* 0x00 appears to mirror IN2 Low Limit */
dev->regs[0x01] = dev->regs[0x23]; /* appears to mirror IN3 */
dev->regs[0x02] = dev->regs[0x20]; /* appears to mirror IN0 */
dev->regs[0x03] = 0x60;
@@ -512,7 +512,7 @@ const device_t w83781d_device = {
/*
* ASUS AS99127F is a customized W83781D with no ISA interface (SMBus only),
* The ASUS AS99127F is a customized W83781D with no ISA interface (SMBus only),
* added proprietary registers and different chip/vendor IDs.
*/
const device_t as99127f_device = {
@@ -526,7 +526,7 @@ const device_t as99127f_device = {
/*
* Rev. 2 changes the vendor ID back to Winbond's.
* Rev. 2 changes the vendor ID back to Winbond's and brings some other changes.
*/
const device_t as99127f_rev2_device = {
"ASUS AS99127F Rev. 2 Hardware Monitor",

1
src/spd.c
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@@ -184,6 +184,7 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
spd_log("SPD: vslot %d = %d MB\n", vslot, vslots[vslot]);
total_size -= vslots[vslot];
} else {
vslots[vslot] = 0;
break;
}
}