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Mach64/GX improvements and minor SVGA fixes.

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This commit is contained in:
OBattler
2016-07-25 03:42:35 +02:00
parent ff7e0880d1
commit 575cfef430
2 changed files with 31 additions and 8 deletions
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35
src/vid_ati_mach64.c
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@@ -458,19 +458,24 @@ void mach64_updatemapping(mach64_t *mach64)
svga->banked_mask = 0x7fff;
break;
}
if (mach64->linear_base)
// if (mach64->linear_base)
if ((mach64->config_cntl & 3))
{
if ((mach64->config_cntl & 3) == 2)
{
/*8 MB aperture*/
mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000);
mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000);
mach64->config_cntl &= 0x3ff0;
mach64->config_cntl |= ((mach64->linear_base >> 5) << 23);
}
else
{
/*4 MB aperture*/
mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (4 << 20) - 0x4000);
mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((4 << 20) - 0x4000), 0x4000);
mach64->config_cntl &= 0x3ff0;
mach64->config_cntl |= ((mach64->linear_base >> 4) << 22);
}
}
else
@@ -2176,7 +2181,11 @@ uint8_t mach64_ext_inb(uint16_t port, void *p)
break;
case 0x6aec: case 0x6aed: case 0x6aee: case 0x6aef:
mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4);
; mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4);
/* if ((mach64->config_cntl & 3) == 2)
mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 23) << 5);
else
mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); */
READ8(port, mach64->config_cntl);
break;
@@ -2185,10 +2194,20 @@ uint8_t mach64_ext_inb(uint16_t port, void *p)
break;
case 0x72ec:
if (PCI)
ret = 7 | (3 << 3); /*PCI, 256Kx16 DRAM*/
else
ret = 6 | (3 << 3); /*VLB, 256Kx16 DRAM*/
if (mach64->vram_size == 8)
{
if (PCI)
ret = 7 | (6 << 3); /*PCI, 256Kx16 DRAM*/
else
ret = 6 | (6 << 3); /*VLB, 256Kx16 DRAM*/
}
else
{
if (PCI)
ret = 7 | (3 << 3); /*PCI, 256Kx16 DRAM*/
else
ret = 6 | (3 << 3); /*VLB, 256Kx16 DRAM*/
}
break;
case 0x72ed:
ret = 5 << 1; /*ATI-68860*/
@@ -2347,6 +2366,10 @@ void mach64_ext_outb(uint16_t port, uint8_t val, void *p)
case 0x6aec: case 0x6aed: case 0x6aee: case 0x6aef:
WRITE8(port, mach64->config_cntl, val);
if ((mach64->config_cntl & 3) == 2)
mach64->linear_base = ((mach64->config_cntl & 0x3fe0) >> 4) << 22;
else
mach64->linear_base = ((mach64->config_cntl & 0x3ff0) >> 4) << 22;
mach64_updatemapping(mach64);
break;
}

4
src/vid_svga.c
View File

@@ -1015,7 +1015,7 @@ uint8_t svga_read(uint32_t addr, void *p)
addr &= svga->banked_mask;
addr += svga->read_bank;
latch_addr = (addr << 2) & 0x7fffff;
latch_addr = (addr << 2) % svga->vram_limit;
// pclog("%05X %i %04X:%04X %02X %02X %i\n",addr,svga->chain4,CS,pc, vram[addr & 0x7fffff], vram[(addr << 2) & 0x7fffff], svga->readmode);
// pclog("%i\n", svga->readmode);
@@ -1274,7 +1274,7 @@ uint8_t svga_read_linear(uint32_t addr, void *p)
addr %= svga->vram_limit;
if (addr >= svga->vram_limit)
return 0xff;
return svga->vram[addr & 0x7fffff];
return svga->vram[addr % svga->vram_limit];
}
else if (svga->chain2_read)
{