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Fixes to the OAK OTi graphics cards' emulation, the 037C and the AMA932J's internal 067 now work.

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This commit is contained in:
OBattler
2018-10-08 00:22:40 +02:00
parent 45731dbaa0
commit 5f965ef27d
2 changed files with 161 additions and 80 deletions
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237
src/video/vid_oak_oti.c
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@@ -8,7 +8,7 @@
*
* Oak OTI037C/67/077 emulation.
*
* Version: @(#)vid_oak_oti.c 1.0.14 2018/10/02
* Version: @(#)vid_oak_oti.c 1.0.15 2018/10/07
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -29,11 +29,18 @@
#include "vid_oak_oti.h"
#include "vid_svga.h"
#define BIOS_37C_PATH L"roms/video/oti/bios.bin"
#define BIOS_67_AMA932J_PATH L"roms/machines/ama932j/oti067.bin"
#define BIOS_77_PATH L"roms/video/oti/oti077.vbi"
#define BIOS_037C_PATH L"roms/video/oti/bios.bin"
#define BIOS_067_AMA932J_PATH L"roms/machines/ama932j/oti067.bin"
#define BIOS_077_PATH L"roms/video/oti/oti077.vbi"
enum {
OTI_037C,
OTI_067 = 2,
OTI_067_AMA932J,
OTI_077 = 5
};
typedef struct {
svga_t svga;
@@ -42,14 +49,13 @@ typedef struct {
int index;
uint8_t regs[32];
uint8_t chip_id;
uint8_t pos;
uint8_t enable_register;
uint8_t enable_register;
uint8_t dipswitch_val;
uint32_t vram_size;
uint32_t vram_mask;
uint8_t chip_id;
} oti_t;
static video_timings_t timing_oti = {VIDEO_ISA, 6, 8,16, 6, 8,16};
@@ -61,34 +67,43 @@ oti_out(uint16_t addr, uint8_t val, void *p)
oti_t *oti = (oti_t *)p;
svga_t *svga = &oti->svga;
uint8_t old;
uint8_t idx;
uint8_t idx, enable;
if (!oti->chip_id && !(oti->enable_register & 1) && (addr != 0x3C3))
return;
if (!(oti->enable_register & 1) && addr != 0x3C3)
return;
if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) &&
!(svga->miscout & 1)) addr ^= 0x60;
switch (addr) {
case 0x3C3:
oti->enable_register = val & 1;
return;
if (!oti->chip_id) {
oti->enable_register = val & 1;
return;
} else
break;
case 0x3D4:
svga->crtcreg = val;
if (oti->chip_id)
svga->crtcreg = val & 0x3f;
else
svga->crtcreg = val; /* FIXME: The BIOS wants to set the test bit? */
return;
case 0x3D5:
if (svga->crtcreg & 0x20)
if (oti->chip_id && (svga->crtcreg & 0x20))
return;
if (((svga->crtcreg & 31) < 7) && (svga->crtc[0x11] & 0x80))
idx = svga->crtcreg;
if (!oti->chip_id)
idx &= 0x1f;
if ((idx < 7) && (svga->crtc[0x11] & 0x80))
return;
if (((svga->crtcreg & 31) == 7) && (svga->crtc[0x11] & 0x80))
if ((idx == 7) && (svga->crtc[0x11] & 0x80))
val = (svga->crtc[7] & ~0x10) | (val & 0x10);
old = svga->crtc[svga->crtcreg & 31];
svga->crtc[svga->crtcreg & 31] = val;
old = svga->crtc[idx];
svga->crtc[idx] = val;
if (old != val) {
if ((svga->crtcreg & 31) < 0xE || (svga->crtcreg & 31) > 0x10) {
if ((idx < 0x0e) || (idx > 0x10)) {
svga->fullchange = changeframecount;
svga_recalctimings(svga);
}
@@ -96,30 +111,60 @@ oti_out(uint16_t addr, uint8_t val, void *p)
break;
case 0x3DE:
oti->index = val;
if (oti->chip_id)
oti->index = val & 0x1f;
else
oti->index = val;
return;
case 0x3DF:
idx = oti->index & 0x1f;
idx = oti->index;
if (!oti->chip_id)
idx &= 0x1f;
oti->regs[idx] = val;
switch (idx) {
case 0xD:
if (oti->chip_id)
{
if (oti->chip_id == OTI_067) {
svga->vram_display_mask = (val & 0xc) ? oti->vram_mask : 0x3ffff;
if (!(val & 0x80))
svga->vram_display_mask = 0x3ffff;
if ((val & 0x80) && oti->vram_size == 256)
mem_mapping_disable(&svga->mapping);
else
mem_mapping_enable(&svga->mapping);
if (!(val & 0x80))
svga->vram_display_mask = 0x3ffff;
}
else
{
if (val & 0x80)
mem_mapping_disable(&svga->mapping);
} else if (oti->chip_id == OTI_077) {
svga->vram_display_mask = (val & 0xc) ? oti->vram_mask : 0x3ffff;
switch ((val & 0xc0) >> 6) {
case 0x00: /* 256 kB of memory */
default:
enable = (oti->vram_size >= 256);
if (val & 0xc)
svga->vram_display_mask = MIN(oti->vram_mask, 0x3ffff);
break;
case 0x01: /* 1 MB of memory */
case 0x03:
enable = (oti->vram_size >= 1024);
if (val & 0xc)
svga->vram_display_mask = MIN(oti->vram_mask, 0x7ffff);
break;
case 0x20: /* 512 kB of memory */
enable = (oti->vram_size >= 512);
if (val & 0xc)
svga->vram_display_mask = MIN(oti->vram_mask, 0xfffff);
break;
}
if (enable)
mem_mapping_enable(&svga->mapping);
else
mem_mapping_enable(&svga->mapping);
mem_mapping_disable(&svga->mapping);
} else {
if (val & 0x80)
mem_mapping_disable(&svga->mapping);
else
mem_mapping_enable(&svga->mapping);
}
break;
@@ -140,33 +185,57 @@ oti_in(uint16_t addr, void *p)
{
oti_t *oti = (oti_t *)p;
svga_t *svga = &oti->svga;
uint8_t temp;
if (!(oti->enable_register & 1) && addr != 0x3C3)
return 0xff;
uint8_t idx, temp;
if (!oti->chip_id && !(oti->enable_register & 1) && (addr != 0x3C3))
return 0xff;
if ((((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && addr < 0x3de) &&
!(svga->miscout & 1)) addr ^= 0x60;
switch (addr) {
case 0x3C3:
temp = oti->enable_register;
case 0x3C2:
if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x50)
temp = 0;
else
temp = 0x10;
break;
case 0x3C3:
if (oti->chip_id)
temp = svga_in(addr, svga);
else
temp = oti->enable_register;
break;
case 0x3CF:
return svga->gdcreg[svga->gdcaddr & 0xf];
case 0x3D4:
temp = svga->crtcreg;
break;
case 0x3D5:
if (svga->crtcreg & 0x20)
temp = 0xff;
else
temp = svga->crtc[svga->crtcreg & 31];
if (oti->chip_id) {
if (svga->crtcreg & 0x20)
temp = 0xff;
else
temp = svga->crtc[svga->crtcreg];
} else
temp = svga->crtc[svga->crtcreg & 0x1f];
break;
case 0x3DA:
if (oti->chip_id) {
temp = svga_in(addr, svga);
break;
}
svga->attrff = 0;
svga->attrff = 0;
/*The OTI-037C BIOS waits for bits 0 and 3 in 0x3da to go low, then reads 0x3da again
and expects the diagnostic bits to equal the current border colour. As I understand
it, the 0x3da active enable status does not include the border time, so this may be
an area where OTI-037C is not entirely VGA compatible.*/
svga->cgastat &= ~0x30;
/* copy color diagnostic info from the overscan color register */
switch (svga->attrregs[0x12] & 0x30)
@@ -196,17 +265,23 @@ oti_in(uint16_t addr, void *p)
svga->cgastat |= 0x20;
break;
}
return svga->cgastat;
temp = svga->cgastat;
break;
case 0x3DE:
temp = oti->index | (oti->chip_id << 5);
case 0x3DE:
temp = oti->index;
if (oti->chip_id)
temp |= (oti->chip_id << 5);
break;
case 0x3DF:
if ((oti->index & 0x1f)==0x10)
temp = 0x18;
else
temp = oti->regs[oti->index & 0x1f];
case 0x3DF:
idx = oti->index;
if (!oti->chip_id)
idx &= 0x1f;
if (idx == 0x10)
temp = oti->dipswitch_val;
else
temp = oti->regs[idx];
break;
default:
@@ -223,7 +298,7 @@ oti_pos_out(uint16_t addr, uint8_t val, void *p)
{
oti_t *oti = (oti_t *)p;
if ((val & 8) != (oti->pos & 8)) {
if ((val ^ oti->pos) & 8) {
if (val & 8)
io_sethandler(0x03c0, 32, oti_in, NULL, NULL,
oti_out, NULL, NULL, oti);
@@ -254,7 +329,7 @@ oti_recalctimings(svga_t *svga)
if (oti->regs[0x0d] & 0x0c) svga->rowoffset <<= 1;
svga->interlace = oti->regs[0x14] & 0x80;
svga->interlace = oti->regs[0x14] & 0x80;
}
@@ -267,27 +342,38 @@ oti_init(const device_t *info)
memset(oti, 0x00, sizeof(oti_t));
oti->chip_id = info->local;
oti->dipswitch_val = 0x18;
switch(oti->chip_id) {
case 0:
romfn = BIOS_37C_PATH;
case OTI_037C:
romfn = BIOS_037C_PATH;
oti->vram_size = 256;
oti->regs[0] = 0x08; /* FIXME: The BIOS wants to read this at index 0? This index is undocumented. */
/* io_sethandler(0x03c0, 32,
oti_in, NULL, NULL, oti_out, NULL, NULL, oti); */
break;
case 3:
romfn = BIOS_67_AMA932J_PATH;
case OTI_067_AMA932J:
romfn = BIOS_067_AMA932J_PATH;
oti->chip_id = 2;
oti->vram_size = 512;
oti->dipswitch_val |= 0x20;
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
break;
case 2:
case 5:
romfn = BIOS_77_PATH;
case OTI_067:
case OTI_077:
romfn = BIOS_077_PATH;
oti->vram_size = device_get_config_int("memory");
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
break;
}
if (oti->chip_id == 3)
oti->chip_id = 2;
rom_init(&oti->bios_rom, romfn,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
oti->vram_size = device_get_config_int("memory");
oti->vram_mask = (oti->vram_size << 10) - 1;
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_oti);
@@ -297,12 +383,9 @@ oti_init(const device_t *info)
io_sethandler(0x03c0, 32,
oti_in, NULL, NULL, oti_out, NULL, NULL, oti);
io_sethandler(0x46e8, 1, oti_pos_in,NULL,NULL, oti_pos_out,NULL,NULL, oti);
oti->svga.miscout = 1;
oti->regs[0] = 0x08; /* fixme: bios wants to read this at index 0? this index is undocumented */
return(oti);
}
@@ -339,19 +422,19 @@ oti_force_redraw(void *p)
static int
oti037c_available(void)
{
return(rom_present(BIOS_37C_PATH));
return(rom_present(BIOS_037C_PATH));
}
static int
oti067_ama932j_available(void)
{
return(rom_present(BIOS_67_AMA932J_PATH));
return(rom_present(BIOS_067_AMA932J_PATH));
}
static int
oti067_077_available(void)
{
return(rom_present(BIOS_77_PATH));
return(rom_present(BIOS_077_PATH));
}
@@ -409,8 +492,7 @@ const device_t oti037c_device =
oti_init, oti_close, NULL,
oti037c_available,
oti_speed_changed,
oti_force_redraw,
oti067_config
oti_force_redraw
};
const device_t oti067_device =
@@ -433,8 +515,7 @@ const device_t oti067_ama932j_device =
oti_init, oti_close, NULL,
oti067_ama932j_available,
oti_speed_changed,
oti_force_redraw,
oti067_config
oti_force_redraw
};
const device_t oti077_device =

4
src/video/vid_svga.c
View File

@@ -11,7 +11,7 @@
* This is intended to be used by another SVGA driver,
* and not as a card in it's own right.
*
* Version: @(#)vid_svga.c 1.0.33 2018/10/04
* Version: @(#)vid_svga.c 1.0.34 2018/10/07
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -348,7 +348,6 @@ svga_in(uint16_t addr, void *p)
break;
case 0x3da:
svga->attrff = 0;
svga->attrff = 0;
if (svga->cgastat & 0x01)
svga->cgastat &= ~0x30;
@@ -789,6 +788,7 @@ svga_init(svga_t *svga, void *p, int memsize,
svga->vram_display_mask = svga->vram_mask = memsize - 1;
svga->decode_mask = 0x7fffff;
svga->changedvram = malloc(memsize >> 12);
svga->changedvram = malloc(0x800000 >> 12);
svga->recalctimings_ex = recalctimings_ex;
svga->video_in = video_in;
svga->video_out = video_out;