Merge pull request #1614 from 86Box/tc1995
Fixed timings once again plus a Boot HDD ROM option and another optio…
This commit is contained in:
Miran Grča
GitHub
commit
5fa2bb9383
@ -113,11 +113,13 @@ typedef struct {
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uint8_t ctrl;
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uint8_t status;
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uint8_t buffer[512];
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uint8_t ext_ram[0x600];
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uint8_t ext_ram[0x80];
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uint8_t block_count;
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int block_loaded, xfer_complete;
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int block_loaded;
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int pos, host_pos;
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int bios_enabled, int_lock;
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} t128_t;
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typedef struct {
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@ -1046,7 +1048,7 @@ ncr_dma_send(ncr5380_t *ncr_dev, ncr_t *ncr, scsi_device_t *dev)
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int bus, c = 0;
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uint8_t data;
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if (scsi_device_get_callback(dev) > 0.0)
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if (scsi_device_get_callback(dev) > 0.0)
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ncr_timer_on(ncr_dev, ncr, 1);
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else
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ncr_timer_on(ncr_dev, ncr, 0);
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@ -1080,7 +1082,6 @@ ncr_dma_send(ncr5380_t *ncr_dev, ncr_t *ncr, scsi_device_t *dev)
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ncr_log("Remaining blocks to be written=%d\n", ncr_dev->t128.block_count);
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if (!ncr_dev->t128.block_count) {
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ncr_dev->t128.block_loaded = 0;
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ncr_dev->t128.xfer_complete = 0;
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ncr_log("IO End of write transfer\n");
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ncr->tcr |= TCR_LAST_BYTE_SENT;
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ncr->isr |= STATUS_END_OF_DMA;
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@ -1253,7 +1254,7 @@ ncr_callback(void *priv)
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}
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if (ncr_dev->t128.host_pos < 512)
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return;
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break;
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}
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ncr_dma_send(ncr_dev, ncr, dev);
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break;
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@ -1284,7 +1285,7 @@ ncr_callback(void *priv)
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}
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if (ncr_dev->t128.host_pos < 512)
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return;
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break;
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}
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ncr_dma_initiator_receive(ncr_dev, ncr, dev);
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break;
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@ -1311,7 +1312,7 @@ t128_read(uint32_t addr, void *priv)
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if (addr >= 0 && addr < 0x1800)
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ret = ncr_dev->bios_rom.rom[addr & 0x1fff];
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else if (addr >= 0x1800 && addr < 0x1880)
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ret = ncr_dev->t128.ext_ram[addr - 0x1800];
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ret = ncr_dev->t128.ext_ram[addr & 0x7f];
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else if (addr >= 0x1c00 && addr < 0x1c20) {
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ret = ncr_dev->t128.ctrl;
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} else if (addr >= 0x1c20 && addr < 0x1c40) {
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@ -1346,7 +1347,7 @@ t128_read(uint32_t addr, void *priv)
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ncr_dev->t128.status &= ~0x04;
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ncr_log("Transfer busy read, status = %02x, period = %lf\n", ncr_dev->t128.status, ncr_dev->period);
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if (ncr_dev->period == 0.2)
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timer_on_auto(&ncr_dev->timer, 10.0);
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timer_on_auto(&ncr_dev->timer, 40.2);
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}
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}
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}
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@ -1362,7 +1363,7 @@ t128_write(uint32_t addr, uint8_t val, void *priv)
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addr &= 0x3fff;
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if (addr >= 0x1800 && addr < 0x1880)
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ncr_dev->t128.ext_ram[addr - 0x1800] = val;
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ncr_dev->t128.ext_ram[addr & 0x7f] = val;
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else if (addr >= 0x1c00 && addr < 0x1c20) {
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if ((val & 0x02) && !(ncr_dev->t128.ctrl & 0x02)) {
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ncr_dev->t128.status |= 0x02;
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@ -1397,7 +1398,7 @@ t128_write(uint32_t addr, uint8_t val, void *priv)
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if (ncr_dev->t128.host_pos == 512) {
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ncr_dev->t128.status &= ~0x04;
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ncr_log("Transfer busy write, status = %02x\n", ncr_dev->t128.status);
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timer_on_auto(&ncr_dev->timer, 0.2);
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timer_on_auto(&ncr_dev->timer, 0.02);
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}
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} else
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ncr_log("Write PDMA addr = %i, val = %02x\n", addr & 0x1ff, val);
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@ -1472,8 +1473,12 @@ ncr_init(const device_t *info)
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case 3: /* Trantor T128 */
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ncr_dev->rom_addr = device_get_config_hex20("bios_addr");
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ncr_dev->irq = device_get_config_int("irq");
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rom_init(&ncr_dev->bios_rom, T128_ROM,
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ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
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ncr_dev->t128.bios_enabled = device_get_config_int("boot");
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ncr_dev->t128.int_lock = device_get_config_int("int_lock");
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if (ncr_dev->t128.bios_enabled)
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rom_init(&ncr_dev->bios_rom, T128_ROM,
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ncr_dev->rom_addr, 0x4000, 0x3fff, 0, MEM_MAPPING_EXTERNAL);
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mem_mapping_add(&ncr_dev->mapping, ncr_dev->rom_addr, 0x4000,
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t128_read, NULL, NULL,
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@ -1496,6 +1501,11 @@ ncr_init(const device_t *info)
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} else {
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ncr_dev->t128.status = 0x04;
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ncr_dev->t128.host_pos = 512;
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if (!ncr_dev->t128.bios_enabled)
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ncr_dev->t128.status |= 0x80;
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if (ncr_dev->t128.int_lock)
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ncr_dev->t128.status |= 0x40;
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}
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timer_add(&ncr_dev->timer, ncr_callback, ncr_dev, 0);
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@ -1712,6 +1722,55 @@ static const device_config_t t130b_config[] = {
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};
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static const device_config_t t128_config[] = {
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{
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"bios_addr", "BIOS Address", CONFIG_HEX20, "", 0xD8000, "", { 0 },
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{
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{
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"C800H", 0xc8000
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},
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{
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"CC00H", 0xcc000
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},
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{
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"D800H", 0xd8000
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},
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{
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"DC00H", 0xdc000
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},
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{
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""
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}
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},
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},
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{
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"irq", "IRQ", CONFIG_SELECTION, "", 5, "", { 0 },
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{
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{
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"IRQ 3", 3
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},
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{
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"IRQ 5", 5
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},
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{
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"IRQ 7", 7
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},
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{
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""
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}
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},
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},
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{
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"boot", "Enable Boot ROM", CONFIG_BINARY, "", 1
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},
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{
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"int_lock", "Enable Handshake Interlock", CONFIG_BINARY, "", 0
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},
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{
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"", "", -1
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}
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};
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const device_t scsi_lcs6821n_device =
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{
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"Longshine LCS-6821N",
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@ -1753,5 +1812,5 @@ const device_t scsi_t128_device =
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ncr_init, ncr_close, NULL,
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{ t128_available },
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NULL, NULL,
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ncr5380_mmio_config
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t128_config
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};
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