Minor bugfixes on the SiS 5571
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@@ -210,7 +210,7 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv)
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dev->pci_conf[addr] = val & 0xec;
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break;
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case 0x51: /* Cache */
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case 0x51: /* L2 Cache */
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dev->pci_conf[addr] = val;
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cpu_cache_ext_enabled = !!(val & 0x40);
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cpu_update_waitstates();
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@@ -263,7 +263,7 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv)
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case 0x83:
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dev->pci_conf[addr] = val;
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port_92_set_features(dev->port_92, (val & 0x40), (val & 0x80));
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port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x80));
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break;
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case 0x87:
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@@ -272,7 +272,9 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv)
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case 0x93: /* APM SMI */
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dev->pci_conf[addr] = val;
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apm_set_do_smi(dev->apm, ((dev->pci_conf[0x9b] & 0x01) && (val & 0x02)));
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apm_set_do_smi(dev->apm, !!((dev->pci_conf[0x9b] & 0x01) && (val & 0x02)));
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if (val & 0x02)
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dev->pci_conf[0x9d] |= 1;
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break;
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case 0x94:
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@@ -326,7 +328,7 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
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case 0x43:
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case 0x44:
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dev->pci_conf_sb[0][addr] = val & 0x8f;
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pci_set_irq_routing(PCI_INTA + (val & 0x07), !(val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED);
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pci_set_irq_routing((addr & 0x07), !(val & 0x80) ? (val & 0x0f) : PCI_IRQ_DISABLED);
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break;
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case 0x45:
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@@ -415,7 +417,7 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
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}
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sis_5571_log("IDE Controller: dev->pci_conf[%02x] = %02x\n", addr, val);
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if ((addr == 0x09) || ((addr >= 0x10) && (addr <= 0x23)) || (addr == 0x4a))
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if (((addr >= 0x09) && (addr <= 0x23)) || (addr == 0x4a))
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sis_5571_ide_handler(dev);
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break;
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@@ -593,7 +595,6 @@ sis_5571_init(const device_t *info)
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pci_add_card(PCI_ADD_NORTHBRIDGE, memory_pci_bridge_read, memory_pci_bridge_write, dev);
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dev->sb_pci_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, pci_isa_bridge_read, pci_isa_bridge_write, dev);
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pci_enable_mirq(1);
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/* APM */
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dev->apm = device_add(&apm_pci_device);
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@@ -601,16 +602,19 @@ sis_5571_init(const device_t *info)
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/* DMA */
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dma_alias_set();
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/* MIRQ */
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pci_enable_mirq(0);
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/* Port 92 & SMRAM */
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dev->port_92 = device_add(&port_92_pci_device);
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dev->smram = smram_add();
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/* SFF IDE */
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dev->bm[0] = device_add_inst(&sff8038i_device, 1);
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dev->bm[1] = device_add_inst(&sff8038i_device, 2);
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dev->program_status_pri = 0;
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dev->program_status_sec = 0;
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/* Port 92 & SMRAM */
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dev->port_92 = device_add(&port_92_pci_device);
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dev->smram = smram_add();
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/* USB */
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dev->usb = device_add(&usb_device);
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