DMA channel 0 page setting is now writable on 386 and later machines;
DMA channel 4 now correctly works as a cascade.
This commit is contained in:
24
src/dma.c
24
src/dma.c
@@ -218,6 +218,12 @@ void dma_page_write(uint16_t addr, uint8_t val, void *priv)
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case 3:
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dma.page[1] = (AT) ? val : val & 0xf;
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break;
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case 0x7:
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if (is386)
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{
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dma.page[0] = (AT) ? val : val & 0xf;
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}
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break;
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case 0x9:
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dma16.page[2] = val;
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break;
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@@ -313,7 +319,7 @@ int dma_channel_read(int channel)
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else
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{
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channel &= 3;
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if (dma16.m & (1 << channel))
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if ((dma16.m & (1 << channel)) || (dma16.m & 1))
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return DMA_NODATA;
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if ((dma16.mode[channel] & 0xC) != 8)
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return DMA_NODATA;
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@@ -337,7 +343,13 @@ int dma_channel_read(int channel)
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dma16.ac[channel] = dma16.ab[channel];
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}
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else
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{
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dma16.m |= (1 << channel);
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if (!channel)
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{
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dma16.m |= 0xf;
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}
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}
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dma16.stat |= (1 << channel);
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}
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@@ -397,7 +409,7 @@ int dma_channel_write(int channel, uint16_t val)
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else
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{
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channel &= 3;
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if (dma16.m & (1 << channel))
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if ((dma16.m & (1 << channel)) || (dma16.m & 1))
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return DMA_NODATA;
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if ((dma16.mode[channel] & 0xC) != 4)
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return DMA_NODATA;
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@@ -419,11 +431,15 @@ int dma_channel_write(int channel, uint16_t val)
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dma16.cc[channel] = dma16.cb[channel] + 1;
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dma16.ac[channel] = dma16.ab[channel];
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}
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dma16.m |= (1 << channel);
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dma16.m |= (1 << channel);
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if (!channel)
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{
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dma16.m |= 0xf;
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}
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dma16.stat |= (1 << channel);
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}
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if (dma.m & (1 << channel))
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if ((dma.m & (1 << channel)) || (dma.m & 1))
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return DMA_OVER;
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}
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return 0;
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