80486DX2-66/86Box-fork
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Merge branch 'master' of https://github.com/86Box/86Box into qt

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This commit is contained in:
ts-korhonen
2021-12-20 00:43:22 +02:00
parent b6b43a13a0 4d2ed33ff2
commit 75d4e923ae
22 changed files with 113 additions and 107 deletions
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2
src/86box.c
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@@ -1042,7 +1042,7 @@ pc_reset_hard_init(void)
/* Reset the CPU module. */
resetx86();
dma_reset();
pic_reset();
pci_pic_reset();
cpu_cache_int_enabled = cpu_cache_ext_enabled = 0;
atfullspeed = 0;

1
src/chipset/via_vt82c505.c
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@@ -180,6 +180,7 @@ vt82c505_reset(void *priv)
}
pic_reset();
pic_set_pci_flag(1);
}

14
src/config.c
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@@ -858,10 +858,6 @@ load_machine(void)
/* Remove this after a while.. */
config_delete_var(cat, "nvr_path");
config_delete_var(cat, "enable_sync");
/* Set up the architecture flags. */
AT = IS_AT(machine);
PCI = IS_ARCH(machine, MACHINE_BUS_PCI);
}
@@ -1149,7 +1145,8 @@ load_storage_controllers(void)
ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0);
ide_qua_enabled = !!config_get_int(cat, "ide_qua", 0);
cassette_enable = !!config_get_int(cat, "cassette_enabled", AT ? 0 : 1);
/* TODO: Re-enable by default after we actually have a proper machine flag for this. */
cassette_enable = !!config_get_int(cat, "cassette_enabled", 0);
p = config_get_string(cat, "cassette_file", "");
if (strlen(p) > 511)
fatal("load_storage_controllers(): strlen(p) > 511\n");
@@ -2024,10 +2021,6 @@ config_load(void)
machine = machine_get_machine_from_internal_name("ibmpc");
dpi_scale = 1;
/* Set up the architecture flags. */
AT = IS_AT(machine);
PCI = IS_ARCH(machine, MACHINE_BUS_PCI);
fpu_type = fpu_get_type(cpu_f, cpu, "none");
gfxcard = video_get_video_from_internal_name("cga");
vid_api = plat_vidapi("default");
@@ -2059,7 +2052,8 @@ config_load(void)
for (i = 0; i < ISAMEM_MAX; i++)
isamem_type[i] = 0;
cassette_enable = AT ? 0 : 1;
/* TODO: Re-enable by default when we have a proper machine flag for this. */
cassette_enable = 0;
memset(cassette_fname, 0x00, sizeof(cassette_fname));
memcpy(cassette_mode, "load", strlen("load") + 1);
cassette_pos = 0;

2
src/cpu/386.c
View File

@@ -189,7 +189,7 @@ exec386(int cycs)
loadcs(readmemw(0, addr + 2));
}
} else if (nmi && nmi_enable && nmi_mask) {
if (AT && (cpu_fast_off_flags & 0x20000000))
if (is486 && (cpu_fast_off_flags & 0x20000000))
cpu_fast_off_count = cpu_fast_off_val + 1;
cpu_state.oldpc = cpu_state.pc;

2
src/cpu/386_dynarec.c
View File

@@ -794,7 +794,7 @@ exec386_dynarec(int cycs)
if (smi_line)
enter_smm_check(0);
else if (nmi && nmi_enable && nmi_mask) {
if (AT && (cpu_fast_off_flags & 0x20000000))
if (is486 && (cpu_fast_off_flags & 0x20000000))
cpu_fast_off_count = cpu_fast_off_val + 1;
#ifndef USE_NEW_DYNAREC

12
src/cpu/808x.c
View File

@@ -570,15 +570,9 @@ reset_808x(int hard)
pfq_clear();
}
if (AT) {
load_cs(0xF000);
cpu_state.pc = 0xFFF0;
rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
} else {
load_cs(0xFFFF);
cpu_state.pc = 0;
rammask = 0xfffff;
}
load_cs(0xFFFF);
cpu_state.pc = 0;
rammask = 0xfffff;
prefetching = 1;
cpu_alu_op = 0;

18
src/cpu/x86.c
View File

@@ -245,6 +245,9 @@ reset_common(int hard)
pci_reset();
if (!hard && soft_reset_pci) {
dma_reset();
/* TODO: Hack, but will do for time being, because all AT machines currently are 286+,
and vice-versa. */
dma_set_at(is286);
device_reset_all();
}
}
@@ -264,15 +267,9 @@ reset_common(int hard)
cpu_state.eflags = 0;
cgate32 = 0;
if (is286) {
if (AT) {
loadcs(0xF000);
cpu_state.pc = 0xFFF0;
rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
} else {
loadcs(0xFFFF);
cpu_state.pc = 0;
rammask = 0xfffff;
}
loadcs(0xF000);
cpu_state.pc = 0xFFF0;
rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
}
idt.base = 0;
cpu_state.flags = 2;
@@ -353,6 +350,9 @@ void
hardresetx86(void)
{
dma_reset();
/* TODO: Hack, but will do for time being, because all AT machines currently are 286+,
and vice-versa. */
dma_set_at(is286);
device_reset_all();
cpu_alt_reset = 0;

4
src/cpu/x86seg.c
View File

@@ -83,8 +83,8 @@ seg_reset(x86seg *s)
if (s == &cpu_state.seg_cs) {
if (!cpu_inited)
fatal("seg_reset(&cpu_state.seg.cs) without an initialized CPU\n");
s->base = AT ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0;
s->seg = AT ? 0xf000 : 0xffff;
s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0;
s->seg = is286 ? 0xf000 : 0xffff;
} else {
s->base = 0;
s->seg = 0;

6
src/device/isamem.c
View File

@@ -82,6 +82,8 @@
#include <86box/plat.h>
#include <86box/isamem.h>
#include "cpu.h"
#define ISAMEM_DEBUG 0
@@ -455,7 +457,7 @@ dev->frame_addr = 0xE0000;
isamem_log(")\n");
/* Force (back to) 8-bit bus if needed. */
if ((!AT) && (dev->flags & FLAG_WIDE)) {
if ((!is286) && (dev->flags & FLAG_WIDE)) {
isamem_log("ISAMEM: not AT+ system, forcing 8-bit mode!\n");
dev->flags &= ~FLAG_WIDE;
}
@@ -559,7 +561,7 @@ dev->frame_addr = 0xE0000;
* real mode (so, not by DOS, for example) but it can be used in
* protected mode.
*/
if (AT && addr > 0 && tot > 0) {
if (is286 && addr > 0 && tot > 0) {
t = tot;
isamem_log("ISAMEM: RAM at %05iKB (%iKB)\n", addr>>10, t>>10);

8
src/device/keyboard.c
View File

@@ -26,6 +26,8 @@
#include <86box/machine.h>
#include <86box/keyboard.h>
#include "cpu.h"
int keyboard_scan;
void (*keyboard_send)(uint16_t val);
@@ -103,7 +105,8 @@ key_process(uint16_t scan, int down)
if (!down && codes[scan].brk[0] == 0)
return;
if (AT && ((keyboard_mode & 3) == 3)) {
/* TODO: The keyboard controller needs to report the AT flag to us here. */
if (is286 && ((keyboard_mode & 3) == 3)) {
if (!keyboard_set3_all_break && !down && !(keyboard_set3_flags[codes[scan].mk[0]] & 2))
return;
}
@@ -212,7 +215,8 @@ keyboard_do_break(uint16_t scan)
{
scancode *codes = scan_table;
if (AT && ((keyboard_mode & 3) == 3)) {
/* TODO: The keyboard controller needs to report the AT flag to us here. */
if (is286 && ((keyboard_mode & 3) == 3)) {
if (!keyboard_set3_all_break &&
!recv_key[scan] &&
!(keyboard_set3_flags[codes[scan].mk[0]] & 2))

8
src/device/keyboard_at.c
View File

@@ -1464,7 +1464,7 @@ write64_ami(void *priv, uint8_t val)
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
/* set KBC lines P10-P13 (input port bits 0-3) low */
kbd_log("ATkbc: set KBC lines P10-P13 (input port bits 0-3) low\n");
if (!PCI || (val > 0xb1))
if (!(dev->flags & DEVICE_PCI) || (val > 0xb1))
dev->input_port &= ~(1 << (val & 0x03));
add_data(dev, 0x00);
return 0;
@@ -1472,7 +1472,7 @@ write64_ami(void *priv, uint8_t val)
case 0xb4: case 0xb5:
/* set KBC lines P22-P23 (output port bits 2-3) low */
kbd_log("ATkbc: set KBC lines P22-P23 (output port bits 2-3) low\n");
if (! PCI)
if (! (dev->flags & DEVICE_PCI))
write_output(dev, dev->output_port & ~(4 << (val & 0x01)));
add_data(dev, 0x00);
return 0;
@@ -1480,7 +1480,7 @@ write64_ami(void *priv, uint8_t val)
case 0xb8: case 0xb9: case 0xba: case 0xbb:
/* set KBC lines P10-P13 (input port bits 0-3) high */
kbd_log("ATkbc: set KBC lines P10-P13 (input port bits 0-3) high\n");
if (!PCI || (val > 0xb9)) {
if (!(dev->flags & DEVICE_PCI) || (val > 0xb9)) {
dev->input_port |= (1 << (val & 0x03));
add_data(dev, 0x00);
}
@@ -1489,7 +1489,7 @@ write64_ami(void *priv, uint8_t val)
case 0xbc: case 0xbd:
/* set KBC lines P22-P23 (output port bits 2-3) high */
kbd_log("ATkbc: set KBC lines P22-P23 (output port bits 2-3) high\n");
if (! PCI)
if (! (dev->flags & DEVICE_PCI))
write_output(dev, dev->output_port | (4 << (val & 0x01)));
add_data(dev, 0x00);
return 0;

18
src/dma.c
View File

@@ -46,6 +46,7 @@ static uint8_t dma_stat_rq_pc;
static uint8_t dma_command[2];
static uint8_t dma_req_is_soft;
static uint8_t dma_advanced;
static uint8_t dma_at;
static uint8_t dma_buffer[65536];
static uint16_t dma_sg_base;
static uint16_t dma16_buffer[65536];
@@ -910,7 +911,7 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv)
dma[addr].ab = (dma[addr].ab & 0xff01ffff & dma_mask) | (dma[addr].page << 16);
dma[addr].ac = (dma[addr].ac & 0xff01ffff & dma_mask) | (dma[addr].page << 16);
} else {
dma[addr].page = (AT) ? val : val & 0xf;
dma[addr].page = (dma_at) ? val : val & 0xf;
dma[addr].ab = (dma[addr].ab & 0xff00ffff & dma_mask) | (dma[addr].page << 16);
dma[addr].ac = (dma[addr].ac & 0xff00ffff & dma_mask) | (dma[addr].page << 16);
}
@@ -1002,6 +1003,13 @@ dma_set_mask(uint32_t mask)
}
void
dma_set_at(uint8_t at)
{
dma_at = at;
}
void
dma_reset(void)
{
@@ -1034,6 +1042,8 @@ dma_reset(void)
dma_sg_base = 0x0400;
dma_mask = 0x00ffffff;
dma_at = is286;
}
@@ -1310,7 +1320,7 @@ _dma_write(uint32_t addr, uint8_t val, dma_t *dma_c)
dma_bm_write(addr, &val, 1, dma_transfer_size(dma_c));
} else {
mem_writeb_phys(addr, val);
if (AT)
if (dma_at)
mem_invalidate_range(addr, addr);
}
}
@@ -1387,7 +1397,7 @@ dma_channel_read(int channel)
if ((dma_c->mode & 0xC) != 8)
return(DMA_NODATA);
if (!AT && !channel)
if (!dma_at && !channel)
refreshread();
if (! dma_c->size) {
@@ -1689,6 +1699,6 @@ dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize,
mem_write_phys((void *) bytes, PhysAddress + n, TransferSize);
}
if (AT)
if (dma_at)
mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1);
}

2
src/include/86box/dma.h
View File

@@ -98,6 +98,8 @@ extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_
void dma_set_params(uint8_t advanced, uint32_t mask);
void dma_set_mask(uint32_t mask);
void dma_set_at(uint8_t at);
void dma_ext_mode_init(void);
void dma_high_page_init(void);

5
src/include/86box/machine.h
View File

@@ -85,8 +85,8 @@
#define MACHINE_SCSI_DUAL 0x18000000 /* sys has int dual SCSI - mark as both pri and sec SCSI */
#define MACHINE_CARTRIDGE 0x20000000 /* sys has two cartridge bays */
#define IS_ARCH(m, a) (machines[m].flags & (a)) ? 1 : 0;
#define IS_AT(m) ((machines[m].flags & 0x00000FC8) && !(machines[m].flags & MACHINE_PC98)) ? 1 : 0;
#define IS_ARCH(m, a) ((machines[m].flags & (a)) ? 1 : 0)
#define IS_AT(m) (((machines[m].flags & 0x00000FC8) && !(machines[m].flags & MACHINE_PC98)) ? 1 : 0)
#define CPU_BLOCK(...) (const uint8_t[]) {__VA_ARGS__, 0}
#define MACHINE_MULTIPLIER_FIXED -1, -1
@@ -182,7 +182,6 @@ extern const machine_type_t machine_types[];
extern const machine_t machines[];
extern int bios_only;
extern int machine;
extern int AT, PCI;
/* Core functions. */

4
src/include/86box/pci.h
View File

@@ -98,8 +98,6 @@ extern void pci_set_irq_level(int pci_int, int level);
extern void pci_enable_mirq(int mirq);
extern void pci_set_mirq_routing(int mirq, int irq);
extern uint8_t pci_use_mirq(uint8_t mirq);
extern int pci_irq_is_level(int irq);
extern void pci_set_mirq(uint8_t mirq, int level);
@@ -127,6 +125,8 @@ extern void trc_write(uint16_t port, uint8_t val, void *priv);
extern void pci_bridge_set_ctl(void *priv, uint8_t ctl);
extern void pci_pic_reset(void);
#ifdef EMU_DEVICE_H
extern const device_t dec21150_device;

1
src/include/86box/pic.h
View File

@@ -45,6 +45,7 @@ extern void pic_elcr_write(uint16_t port, uint8_t val, void *priv);
extern uint8_t pic_elcr_read(uint16_t port, void *priv);
extern void pic_set_shadow(int sh);
extern void pic_set_pci_flag(int pci);
extern void pic_set_pci(void);
extern void pic_init(void);
extern void pic_init_pcjr(void);

8
src/machine/machine.c
View File

@@ -44,7 +44,7 @@
int bios_only = 0;
int machine;
int AT, PCI;
// int AT, PCI;
#ifdef ENABLE_MACHINE_LOG
@@ -81,8 +81,8 @@ machine_init_ex(int m)
gameport_instance_id = 0;
/* Set up the architecture flags. */
AT = IS_AT(machine);
PCI = IS_ARCH(machine, MACHINE_BUS_PCI);
// AT = IS_AT(machine);
// PCI = IS_ARCH(machine, MACHINE_BUS_PCI);
cpu_set();
pc_speed_changed();
@@ -146,5 +146,5 @@ machine_common_init(const machine_t *model)
pic_init();
dma_init();
pit_common_init(!!AT, pit_irq0_timer, NULL);
pit_common_init(!!IS_AT(machine), pit_irq0_timer, NULL);
}

47
src/mem/mem.c
View File

@@ -1802,7 +1802,7 @@ mem_read_ram(uint32_t addr, void *priv)
mem_log("Read B %02X from %08X\n", ram[addr], addr);
#endif
if (is286 || AT)
if (is286)
addreadlookup(mem_logical_addr, addr);
return ram[addr];
@@ -1817,7 +1817,7 @@ mem_read_ramw(uint32_t addr, void *priv)
mem_log("Read W %04X from %08X\n", *(uint16_t *)&ram[addr], addr);
#endif
if (is286 || AT)
if (is286)
addreadlookup(mem_logical_addr, addr);
return *(uint16_t *)&ram[addr];
@@ -1832,7 +1832,7 @@ mem_read_raml(uint32_t addr, void *priv)
mem_log("Read L %08X from %08X\n", *(uint32_t *)&ram[addr], addr);
#endif
if (is286 || AT)
if (is286)
addreadlookup(mem_logical_addr, addr);
return *(uint32_t *)&ram[addr];
@@ -2076,7 +2076,7 @@ mem_write_ram(uint32_t addr, uint8_t val, void *priv)
if ((addr >= 0xa0000) && (addr <= 0xbffff))
mem_log("Write B %02X to %08X\n", val, addr);
#endif
if (is286 || AT) {
if (is286) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramb_page(addr, val, &pages[addr >> 12]);
} else
@@ -2091,7 +2091,7 @@ mem_write_ramw(uint32_t addr, uint16_t val, void *priv)
if ((addr >= 0xa0000) && (addr <= 0xbffff))
mem_log("Write W %04X to %08X\n", val, addr);
#endif
if (is286 || AT) {
if (is286) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramw_page(addr, val, &pages[addr >> 12]);
} else
@@ -2106,7 +2106,7 @@ mem_write_raml(uint32_t addr, uint32_t val, void *priv)
if ((addr >= 0xa0000) && (addr <= 0xbffff))
mem_log("Write L %08X to %08X\n", val, addr);
#endif
if (is286 || AT) {
if (is286) {
addwritelookup(mem_logical_addr, addr);
mem_write_raml_page(addr, val, &pages[addr >> 12]);
} else
@@ -2118,7 +2118,7 @@ static uint8_t
mem_read_remapped(uint32_t addr, void *priv)
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT)
if (is286)
addreadlookup(mem_logical_addr, addr);
return ram[addr];
}
@@ -2128,7 +2128,7 @@ static uint16_t
mem_read_remappedw(uint32_t addr, void *priv)
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT)
if (is286)
addreadlookup(mem_logical_addr, addr);
return *(uint16_t *)&ram[addr];
}
@@ -2138,7 +2138,7 @@ static uint32_t
mem_read_remappedl(uint32_t addr, void *priv)
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT)
if (is286)
addreadlookup(mem_logical_addr, addr);
return *(uint32_t *)&ram[addr];
}
@@ -2149,7 +2149,7 @@ mem_write_remapped(uint32_t addr, uint8_t val, void *priv)
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT) {
if (is286) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramb_page(addr, val, &pages[oldaddr >> 12]);
} else
@@ -2162,7 +2162,7 @@ mem_write_remappedw(uint32_t addr, uint16_t val, void *priv)
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT) {
if (is286) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramw_page(addr, val, &pages[oldaddr >> 12]);
} else
@@ -2175,7 +2175,7 @@ mem_write_remappedl(uint32_t addr, uint32_t val, void *priv)
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT) {
if (is286) {
addwritelookup(mem_logical_addr, addr);
mem_write_raml_page(addr, val, &pages[oldaddr >> 12]);
} else
@@ -2537,12 +2537,12 @@ mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t
void
mem_a20_init(void)
{
if (AT) {
if (is286) {
rammask = cpu_16bitbus ? 0xefffff : 0xffefffff;
flushmmucache();
mem_a20_state = mem_a20_key | mem_a20_alt;
} else {
rammask = is286 ? 0xffffff : 0xfffff;
rammask = 0xfffff;
flushmmucache();
mem_a20_key = mem_a20_alt = mem_a20_state = 0;
}
@@ -2665,7 +2665,7 @@ mem_reset(void)
* We re-allocate the table on each (hard) reset, as the
* memory amount could have changed.
*/
if (AT) {
if (is286) {
if (cpu_16bitbus) {
/* 80286/386SX; maximum address space is 16MB. */
m = 4096;
@@ -2674,13 +2674,8 @@ mem_reset(void)
m = 1048576;
}
} else {
if (is286) {
/* 80286; maximum address space is 16MB. */
m = 4096;
} else {
/* 8088/86; maximum address space is 1MB. */
m = 256;
}
/* 8088/86; maximum address space is 1MB. */
m = 256;
}
/*
@@ -2877,8 +2872,8 @@ mem_a20_recalc(void)
{
int state;
if (! AT) {
rammask = is286 ? 0xffffff : 0xfffff;
if (! is286) {
rammask = 0xfffff;
flushmmucache();
mem_a20_key = mem_a20_alt = mem_a20_state = 0;
@@ -2887,10 +2882,10 @@ mem_a20_recalc(void)
state = mem_a20_key | mem_a20_alt;
if (state && !mem_a20_state) {
rammask = (AT && cpu_16bitbus) ? 0xffffff : 0xffffffff;
rammask = (cpu_16bitbus) ? 0xffffff : 0xffffffff;
flushmmucache();
} else if (!state && mem_a20_state) {
rammask = (AT && cpu_16bitbus) ? 0xefffff : 0xffefffff;
rammask = (cpu_16bitbus) ? 0xefffff : 0xffefffff;
flushmmucache();
}

4
src/mem/rom.c
View File

@@ -422,7 +422,7 @@ bios_add(void)
if (/*AT && */cpu_s) {
temp_cpu_type = cpu_s->cpu_type;
temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC );
temp_is286 = (temp_cpu_type == CPU_286);
temp_is286 = (temp_cpu_type >= CPU_286);
}
if (biosmask > 0x1ffff) {
@@ -444,7 +444,7 @@ bios_add(void)
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
}
if (temp_is286 || AT) {
if (temp_is286) {
mem_mapping_add(&bios_high_mapping, biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,

4
src/network/net_wd8003.c
View File

@@ -63,6 +63,8 @@
#include <86box/net_wd8003.h>
#include <86box/bswap.h>
#include "cpu.h"
/* Board type codes in card ID */
#define WE_TYPE_WD8003 0x01
#define WE_TYPE_WD8003S 0x02
@@ -668,7 +670,7 @@ wd_init(const device_t *info)
dev->board_chip |= WE_ID_EXTRA_RAM;
dev->bit16 = 2;
if (AT)
if (is286)
dev->bit16 |= 1;
else {
dev->bit16 |= 0;

35
src/pci.c
View File

@@ -74,7 +74,6 @@ static int trc_reg = 0;
static void pci_reset_regs(void);
// #define ENABLE_PCI_LOG 1
#ifdef ENABLE_PCI_LOG
int pci_do_log = ENABLE_PCI_LOG;
@@ -487,19 +486,6 @@ pci_set_mirq_routing(int mirq, int irq)
}
uint8_t
pci_use_mirq(uint8_t mirq)
{
if (!PCI || !pci_mirqs[mirq].enabled)
return 0;
if (pci_mirqs[mirq].irq_line & 0x80)
return 0;
return 1;
}
void
pci_set_mirq(uint8_t mirq, int level)
{
@@ -768,6 +754,14 @@ pci_reset_regs(void)
}
void
pci_pic_reset(void)
{
pic_reset();
pic_set_pci_flag(last_pci_card > 0);
}
static void
pci_reset_hard(void)
{
@@ -783,7 +777,7 @@ pci_reset_hard(void)
}
}
pic_reset();
pci_pic_reset();
}
@@ -864,6 +858,8 @@ trc_reset(uint8_t val)
{
if (val & 2) {
dma_reset();
dma_set_at(1);
device_reset_all();
cpu_alt_reset = 0;
@@ -923,8 +919,6 @@ pci_init(int type)
{
int c;
PCI = 1;
pci_slots_clear();
pci_reset_hard();
@@ -972,6 +966,8 @@ pci_init(int type)
pci_mirqs[c].enabled = 0;
pci_mirqs[c].irq_line = PCI_IRQ_DISABLED;
}
pic_set_pci_flag(1);
}
@@ -1066,11 +1062,6 @@ pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv),
if (add_type < PCI_ADD_AGP)
pci_log("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type);
if (! PCI) {
pci_log("pci_add_card(): Adding PCI CARD failed (non-PCI machine) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC")))));
return 0xff;
}
if (! last_pci_card) {
pci_log("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC")))));
return 0xff;

15
src/pic.c
View File

@@ -52,7 +52,8 @@ pic_t pic, pic2;
static pc_timer_t pic_timer;
static int shadow = 0, elcr_enabled = 0,
tmr_inited = 0, latched = 0;
tmr_inited = 0, latched = 0,
pic_pci = 0;
static uint16_t smi_irq_mask = 0x0000,
smi_irq_status = 0x0000;
@@ -292,6 +293,9 @@ pic_reset()
pic.at = pic2.at = is_at;
smi_irq_mask = smi_irq_status = 0x0000;
shadow = 0;
pic_pci = 0;
}
@@ -302,6 +306,13 @@ pic_set_shadow(int sh)
}
void
pic_set_pci_flag(int pci)
{
pic_pci = pci;
}
static uint8_t
pic_level_triggered(pic_t *dev, int irq)
{
@@ -487,7 +498,7 @@ pic_write(uint16_t addr, uint8_t val, void *priv)
} else {
if (val & 0x10) {
/* Treat any write with any of the bits 7 to 5 set as invalid if PCI. */
if (PCI && (val & 0xe0))
if (pic_pci && (val & 0xe0))
return;
dev->icw1 = val;