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0x01 on SDAC is actually 8bpp word mode, fixes #1344.

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OBattler
2021-03-31 18:52:29 +02:00
parent 56d62de4fe
commit 8504e412a5
1 changed files with 1 additions and 3 deletions
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4
src/video/vid_sdac_ramdac.c
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@@ -89,6 +89,7 @@ sdac_control_write(sdac_ramdac_t *ramdac, svga_t *svga, uint8_t val)
case ICS_5342: case ICS_5342:
switch (val >> 4) { switch (val >> 4) {
case 0x00: case 0x00:
case 0x01: /* This is actually 8bpp with two pixels read at a time. */
default: default:
svga->bpp = 8; svga->bpp = 8;
break; break;
@@ -98,9 +99,6 @@ sdac_control_write(sdac_ramdac_t *ramdac, svga_t *svga, uint8_t val)
case 0x0a: case 0x0a:
svga->bpp = 15; svga->bpp = 15;
break; break;
case 0x01:
svga->bpp = 17; /* 15bpp_mix */
break;
case 0x05: case 0x05:
case 0x06: case 0x06:
case 0x0c: case 0x0c: