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Implemented the P6 model-specific register 1D9h (DEBUG_CTL), needed by Netware 6.0.

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OBattler
2023-08-07 03:29:10 +02:00
parent a1dae1b7a3
commit 8a1cbbcba1
2 changed files with 12 additions and 0 deletions
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7
src/cpu/cpu.c
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@@ -2735,6 +2735,10 @@ amd_k_invalid_rdmsr:
EAX = msr.ecx187 & 0xffffffff;
EDX = msr.ecx187 >> 32;
break;
case 0x1d9:
EAX = msr.debug_ctl & 0xffffffff;
EDX = msr.debug_ctl >> 32;
break;
case 0x1e0:
EAX = msr.ecx1e0 & 0xffffffff;
EDX = msr.ecx1e0 >> 32;
@@ -3172,6 +3176,9 @@ amd_k_invalid_wrmsr:
case 0x187:
msr.ecx187 = EAX | ((uint64_t) EDX << 32);
break;
case 0x1d9:
msr.debug_ctl = EAX | ((uint64_t) EDX << 32);
break;
case 0x1e0:
msr.ecx1e0 = EAX | ((uint64_t) EDX << 32);
break;

5
src/cpu/cpu.h
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@@ -284,6 +284,11 @@ typedef struct {
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t ecx186; /* 0x00000186, 0x00000187 */
uint64_t ecx187; /* 0x00000186, 0x00000187 */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t debug_ctl; /* 0x000001d9 - Debug Registers Control */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
uint64_t ecx1e0; /* 0x000001e0 */
/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also