Implemented the P6 model-specific register 1D9h (DEBUG_CTL), needed by Netware 6.0.
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@@ -2735,6 +2735,10 @@ amd_k_invalid_rdmsr:
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EAX = msr.ecx187 & 0xffffffff;
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EAX = msr.ecx187 & 0xffffffff;
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EDX = msr.ecx187 >> 32;
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EDX = msr.ecx187 >> 32;
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break;
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break;
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case 0x1d9:
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EAX = msr.debug_ctl & 0xffffffff;
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EDX = msr.debug_ctl >> 32;
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break;
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case 0x1e0:
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case 0x1e0:
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EAX = msr.ecx1e0 & 0xffffffff;
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EAX = msr.ecx1e0 & 0xffffffff;
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EDX = msr.ecx1e0 >> 32;
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EDX = msr.ecx1e0 >> 32;
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@@ -3172,6 +3176,9 @@ amd_k_invalid_wrmsr:
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case 0x187:
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case 0x187:
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msr.ecx187 = EAX | ((uint64_t) EDX << 32);
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msr.ecx187 = EAX | ((uint64_t) EDX << 32);
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break;
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break;
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case 0x1d9:
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msr.debug_ctl = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x1e0:
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case 0x1e0:
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msr.ecx1e0 = EAX | ((uint64_t) EDX << 32);
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msr.ecx1e0 = EAX | ((uint64_t) EDX << 32);
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break;
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break;
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@@ -284,6 +284,11 @@ typedef struct {
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t ecx186; /* 0x00000186, 0x00000187 */
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uint64_t ecx186; /* 0x00000186, 0x00000187 */
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uint64_t ecx187; /* 0x00000186, 0x00000187 */
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uint64_t ecx187; /* 0x00000186, 0x00000187 */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t debug_ctl; /* 0x000001d9 - Debug Registers Control */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t ecx1e0; /* 0x000001e0 */
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uint64_t ecx1e0; /* 0x000001e0 */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also
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