@@ -9,15 +9,15 @@
|
||||
* CD-ROM image file handling module, translated to C from
|
||||
* cdrom_dosbox.cpp.
|
||||
*
|
||||
* Version: @(#)cdrom_image_backend.c 1.0.1 2019/12/21
|
||||
* Version: @(#)cdrom_image_backend.c 1.0.2 2020/01/11
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* The DOSBox Team, <unknown>
|
||||
*
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2017-2019 Fred N. van Kempen.
|
||||
* Copyright 2002-2019 The DOSBox Team.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
* Copyright 2002-2020 The DOSBox Team.
|
||||
*/
|
||||
#define _LARGEFILE_SOURCE
|
||||
#define _LARGEFILE64_SOURCE
|
||||
@@ -903,7 +903,7 @@ cdi_load_cue(cd_img_t *cdi, const wchar_t *cuefile)
|
||||
}
|
||||
success = 0;
|
||||
}
|
||||
} else if (!strcmp(command, "FILE"))
|
||||
} else if (!strcmp(command, "PREGAP"))
|
||||
success = cdi_cue_get_frame(&cur_pregap, &line);
|
||||
else if (!strcmp(command, "CATALOG") || !strcmp(command, "CDTEXTFILE") || !strcmp(command, "FLAGS") || !strcmp(command, "ISRC") ||
|
||||
!strcmp(command, "PERFORMER") || !strcmp(command, "POSTGAP") || !strcmp(command, "REM") ||
|
||||
|
@@ -623,7 +623,7 @@ kbd_poll(void *priv)
|
||||
{
|
||||
atkbd_t *dev = (atkbd_t *)priv;
|
||||
|
||||
timer_advance_u64(&dev->send_delay_timer, (1000 * TIMER_USEC));
|
||||
timer_advance_u64(&dev->send_delay_timer, (100ULL * TIMER_USEC));
|
||||
|
||||
if ((dev->out_new != -1) && !dev->last_irq) {
|
||||
dev->wantirq = 0;
|
||||
@@ -658,17 +658,17 @@ kbd_poll(void *priv)
|
||||
dev->out_new = key_ctrl_queue[key_ctrl_queue_start] | 0x200;
|
||||
key_ctrl_queue_start = (key_ctrl_queue_start + 1) & 0xf;
|
||||
} else if (!(dev->status & STAT_OFULL) && dev->out_new == -1 && dev->out_delayed != -1) {
|
||||
dev->out_new = dev->out_delayed;
|
||||
dev->out_delayed = -1;
|
||||
dev->out_new = dev->out_delayed;
|
||||
dev->out_delayed = -1;
|
||||
} else if (!(dev->status & STAT_OFULL) && dev->out_new == -1 && !(dev->mem[0] & 0x10) && dev->out_delayed != -1) {
|
||||
dev->out_new = dev->out_delayed;
|
||||
dev->out_delayed = -1;
|
||||
dev->out_new = dev->out_delayed;
|
||||
dev->out_delayed = -1;
|
||||
} else if (!(dev->status & STAT_OFULL) && dev->out_new == -1/* && !(dev->mem[0] & 0x20)*/ &&
|
||||
(mouse_queue_start != mouse_queue_end)) {
|
||||
dev->out_new = mouse_queue[mouse_queue_start] | 0x100;
|
||||
mouse_queue_start = (mouse_queue_start + 1) & 0xf;
|
||||
} else if (!(dev->status&STAT_OFULL) && dev->out_new == -1 &&
|
||||
!(dev->mem[0]&0x10) && (key_queue_start != key_queue_end)) {
|
||||
!(dev->mem[0]&0x10) && (key_queue_start != key_queue_end) && !kbc_busy) {
|
||||
dev->out_new = key_queue[key_queue_start];
|
||||
key_queue_start = (key_queue_start + 1) & 0xf;
|
||||
}
|
||||
@@ -1931,6 +1931,8 @@ do_command:
|
||||
#ifdef ENABLE_KEYBOARD_AT_LOG
|
||||
kbd_log("ATkbd: set defaults\n");
|
||||
#endif
|
||||
dev->out_new = -1;
|
||||
dev->out_delayed = -1;
|
||||
add_data_kbd(0xfa);
|
||||
|
||||
keyboard_set3_all_break = 0;
|
||||
@@ -2273,6 +2275,7 @@ kbd_reset(void *priv)
|
||||
dev->wantirq = 0;
|
||||
write_output(dev, 0xcf);
|
||||
dev->out_new = -1;
|
||||
dev->out_delayed = -1;
|
||||
dev->last_irq = 0;
|
||||
dev->secr_phase = 0;
|
||||
dev->key_wantdata = 0;
|
||||
|
69
src/pci.c
69
src/pci.c
@@ -8,15 +8,15 @@
|
||||
*
|
||||
* Implementation the PCI bus.
|
||||
*
|
||||
* Version: @(#)pci.c 1.0.4 2019/11/06
|
||||
* Version: @(#)pci.c 1.0.6 2020/01/11
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Sarah Walker, <tommowalker@tommowalker.co.uk>
|
||||
*
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2017-2019 Fred N. van Kempen.
|
||||
* Copyright 2008-2019 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
@@ -58,7 +58,7 @@ static pci_card_t pci_cards[32];
|
||||
static uint8_t last_pci_card = 0;
|
||||
static uint8_t pci_card_to_slot_mapping[32];
|
||||
static uint8_t elcr[2] = { 0, 0 };
|
||||
static uint8_t pci_irqs[4];
|
||||
static uint8_t pci_irqs[4], pci_irq_level[4];
|
||||
static uint64_t pci_irq_hold[16];
|
||||
static pci_mirq_t pci_mirqs[3];
|
||||
static int pci_type,
|
||||
@@ -68,7 +68,7 @@ static int pci_type,
|
||||
pci_bus,
|
||||
pci_enable,
|
||||
pci_key;
|
||||
static int trc_reg = 0;
|
||||
static int trc_reg = 0, elcr_enabled = 1;
|
||||
|
||||
|
||||
#ifdef ENABLE_PCI_LOG
|
||||
@@ -278,6 +278,13 @@ pci_set_irq_routing(int pci_int, int irq)
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
pci_set_irq_level(int pci_int, int level)
|
||||
{
|
||||
pci_irq_level[pci_int - 1] = !!level;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
pci_enable_mirq(int mirq)
|
||||
{
|
||||
@@ -297,13 +304,20 @@ pci_irq_is_level(int irq)
|
||||
{
|
||||
int real_irq = irq & 7;
|
||||
|
||||
if ((irq <= 2) || (irq == 8) || (irq == 13))
|
||||
return 0;
|
||||
if (elcr_enabled) {
|
||||
if ((irq <= 2) || (irq == 8) || (irq == 13))
|
||||
return 0;
|
||||
|
||||
if (irq > 7)
|
||||
return !!(elcr[1] & (1 << real_irq));
|
||||
if (irq > 7)
|
||||
return !!(elcr[1] & (1 << real_irq));
|
||||
|
||||
return !!(elcr[0] & (1 << real_irq));
|
||||
return !!(elcr[0] & (1 << real_irq));
|
||||
} else {
|
||||
if (irq < 8)
|
||||
return (pic.icw1 & 8) ? 1 : 0;
|
||||
else
|
||||
return (pic2.icw1 & 8) ? 1 : 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -401,6 +415,7 @@ pci_set_irq(uint8_t card, uint8_t pci_int)
|
||||
pci_log("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
|
||||
|
||||
irq_line = pci_irqs[irq_routing];
|
||||
level = pci_irq_level[irq_routing];
|
||||
}
|
||||
|
||||
if (irq_line > 0x0f) {
|
||||
@@ -416,10 +431,6 @@ pci_set_irq(uint8_t card, uint8_t pci_int)
|
||||
}
|
||||
pci_log("pci_set_irq(%02X, %02X): Card not yet holding the IRQ\n", card, pci_int);
|
||||
|
||||
if (pci_type & PCI_NO_IRQ_STEERING)
|
||||
level = 0; /* PCI without IRQ steering - IRQ always edge. */
|
||||
else
|
||||
level = 1; /* PCI with IRQ steering - IRQ always level per the Intel datasheets. */
|
||||
if (!level || !pci_irq_hold[irq_line]) {
|
||||
pci_log("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");
|
||||
|
||||
@@ -433,7 +444,7 @@ pci_set_irq(uint8_t card, uint8_t pci_int)
|
||||
}
|
||||
|
||||
/* If the IRQ is level-triggered, mark that this card is holding it. */
|
||||
if (pci_irq_is_level(irq_line)) {
|
||||
if (level) {
|
||||
pci_log("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int);
|
||||
pci_irq_hold[irq_line] |= (1ULL << card);
|
||||
} else {
|
||||
@@ -522,6 +533,7 @@ pci_clear_irq(uint8_t card, uint8_t pci_int)
|
||||
pci_log("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
|
||||
|
||||
irq_line = pci_irqs[irq_routing];
|
||||
level = pci_irq_level[irq_routing];
|
||||
}
|
||||
|
||||
if (irq_line > 0x0f) {
|
||||
@@ -531,17 +543,12 @@ pci_clear_irq(uint8_t card, uint8_t pci_int)
|
||||
|
||||
pci_log("pci_clear_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
|
||||
|
||||
if (pci_irq_is_level(irq_line) &&
|
||||
!(pci_irq_hold[irq_line] & (1ULL << card))) {
|
||||
if (level && !(pci_irq_hold[irq_line] & (1ULL << card))) {
|
||||
/* IRQ not held, do nothing. */
|
||||
pci_log("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int);
|
||||
return;
|
||||
}
|
||||
|
||||
if (pci_type & PCI_NO_IRQ_STEERING)
|
||||
level = 0; /* PCI without IRQ steering - IRQ always edge. */
|
||||
else
|
||||
level = 1; /* PCI with IRQ steering - IRQ always level per the Intel datasheets. */
|
||||
if (level) {
|
||||
pci_log("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int);
|
||||
pci_irq_hold[irq_line] &= ~(1 << card);
|
||||
@@ -559,6 +566,13 @@ pci_clear_irq(uint8_t card, uint8_t pci_int)
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
pci_elcr_set_enabled(int enabled)
|
||||
{
|
||||
elcr_enabled = enabled;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
pci_reset(void)
|
||||
{
|
||||
@@ -635,7 +649,10 @@ trc_write(uint16_t port, uint8_t val, void *priv)
|
||||
if (!(trc_reg & 4) && (val & 4))
|
||||
trc_reset(val);
|
||||
|
||||
trc_reg = val & 0xfb;
|
||||
trc_reg = val & 0xfd;
|
||||
|
||||
if (val & 2)
|
||||
trc_reg &= 0xfb;
|
||||
}
|
||||
|
||||
|
||||
@@ -681,13 +698,17 @@ pci_init(int type)
|
||||
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
|
||||
}
|
||||
|
||||
for (c = 0; c < 4; c++)
|
||||
for (c = 0; c < 4; c++) {
|
||||
pci_irqs[c] = PCI_IRQ_DISABLED;
|
||||
pci_irq_level[c] = (type & PCI_NO_IRQ_STEERING) ? 0 : 1;
|
||||
}
|
||||
|
||||
for (c = 0; c < 3; c++) {
|
||||
pci_mirqs[c].enabled = 0;
|
||||
pci_mirqs[c].irq_line = PCI_IRQ_DISABLED;
|
||||
}
|
||||
|
||||
elcr_enabled = 1;
|
||||
}
|
||||
|
||||
|
||||
|
10
src/pci.h
10
src/pci.h
@@ -8,15 +8,15 @@
|
||||
*
|
||||
* Definitions for the PCI handler module.
|
||||
*
|
||||
* Version: @(#)pci.h 1.0.1 2019/10/30
|
||||
* Version: @(#)pci.h 1.0.2 2020/01/11
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Sarah Walker, <tommowalker@tommowalker.co.uk>
|
||||
*
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2017-2019 Fred N. van Kempen.
|
||||
* Copyright 2008-2019 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
*/
|
||||
#ifndef EMU_PCI_H
|
||||
# define EMU_PCI_H
|
||||
@@ -68,6 +68,7 @@ extern int pci_burst_time,
|
||||
|
||||
|
||||
extern void pci_set_irq_routing(int pci_int, int irq);
|
||||
extern void pci_set_irq_level(int pci_int, int level);
|
||||
|
||||
extern void pci_enable_mirq(int mirq);
|
||||
extern void pci_set_mirq_routing(int mirq, int irq);
|
||||
@@ -89,6 +90,7 @@ extern void pci_close(void);
|
||||
extern uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv);
|
||||
|
||||
extern void trc_init(void);
|
||||
extern void pci_elcr_set_enabled(int enabled);
|
||||
|
||||
|
||||
#endif /*EMU_PCI_H*/
|
||||
|
@@ -9,13 +9,13 @@
|
||||
* Implementation of the SMC FDC37C663 and FDC37C665 Super
|
||||
* I/O Chips.
|
||||
*
|
||||
* Version: @(#)sio_fdc37c66x.c 1.0.14 2018/11/12
|
||||
* Version: @(#)sio_fdc37c66x.c 1.0.15 2020/01/11
|
||||
*
|
||||
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2008-2018 Sarah Walker.
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
@@ -129,7 +129,17 @@ lpt1_handler(fdc37c66x_t *dev)
|
||||
}
|
||||
|
||||
|
||||
static void fdc37c66x_write(uint16_t port, uint8_t val, void *priv)
|
||||
static void
|
||||
fdc_handler(fdc37c66x_t *dev)
|
||||
{
|
||||
fdc_remove(dev->fdc);
|
||||
if (dev->regs[0] & 0x10)
|
||||
fdc_set_base(dev->fdc, (dev->regs[5] & 0x01) ? 0x0370 : 0x03f0);
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
fdc37c66x_write(uint16_t port, uint8_t val, void *priv)
|
||||
{
|
||||
fdc37c66x_t *dev = (fdc37c66x_t *) priv;
|
||||
uint8_t valxor = 0;
|
||||
@@ -148,6 +158,10 @@ static void fdc37c66x_write(uint16_t port, uint8_t val, void *priv)
|
||||
dev->regs[dev->cur_reg] = val;
|
||||
|
||||
switch(dev->cur_reg) {
|
||||
case 0:
|
||||
if (valxor & 0x10)
|
||||
fdc_handler(dev);
|
||||
break;
|
||||
case 1:
|
||||
if (valxor & 3)
|
||||
lpt1_handler(dev);
|
||||
@@ -173,7 +187,9 @@ static void fdc37c66x_write(uint16_t port, uint8_t val, void *priv)
|
||||
if (valxor & 2)
|
||||
fdc_update_enh_mode(dev->fdc, (dev->regs[3] & 2) ? 1 : 0);
|
||||
break;
|
||||
case 5:
|
||||
case 5:
|
||||
if (valxor & 0x01)
|
||||
fdc_handler(dev);
|
||||
if (valxor & 0x18)
|
||||
fdc_update_densel_force(dev->fdc, (dev->regs[5] & 0x18) >> 3);
|
||||
if (valxor & 0x20)
|
||||
|
@@ -11,10 +11,10 @@
|
||||
* Winbond W83877F Super I/O Chip
|
||||
* Used by the Award 430HX
|
||||
*
|
||||
* Version: @(#)sio_w83877f.c 1.0.15 2019/05/17
|
||||
* Version: @(#)sio_w83877f.c 1.0.16 2020/01/11
|
||||
*
|
||||
* Author: Miran Grca, <mgrca8@gmail.com>
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
@@ -167,12 +167,21 @@ static void
|
||||
w83877f_write(uint16_t port, uint8_t val, void *priv)
|
||||
{
|
||||
w83877f_t *dev = (w83877f_t *) priv;
|
||||
uint8_t index = (port & 1) ? 0 : 1;
|
||||
uint8_t valxor = 0;
|
||||
uint8_t max = 0x2A;
|
||||
uint8_t lpt_irq;
|
||||
|
||||
if (index) {
|
||||
if (port == 0x250) {
|
||||
if (val == dev->key)
|
||||
dev->locked = 1;
|
||||
else
|
||||
dev->locked = 0;
|
||||
return;
|
||||
} else if (port == 0x251) {
|
||||
if (val <= max)
|
||||
dev->cur_reg = val;
|
||||
return;
|
||||
} else if (port == 0x03f0) {
|
||||
if ((val == dev->key) && !dev->locked) {
|
||||
if (dev->key_times == 2) {
|
||||
if (dev->tries) {
|
||||
@@ -196,7 +205,7 @@ w83877f_write(uint16_t port, uint8_t val, void *priv)
|
||||
}
|
||||
}
|
||||
return;
|
||||
} else {
|
||||
} else if ((port == 0x252) || (port == 0x3f1)) {
|
||||
if (dev->locked) {
|
||||
if (dev->rw_locked)
|
||||
return;
|
||||
@@ -214,7 +223,7 @@ w83877f_write(uint16_t port, uint8_t val, void *priv)
|
||||
|
||||
switch (dev->cur_reg) {
|
||||
case 0:
|
||||
if (valxor & 0xc0) {
|
||||
if (valxor & 0x0c) {
|
||||
lpt1_remove();
|
||||
if (!(dev->regs[4] & 0x80))
|
||||
lpt1_init(make_port(dev, 0x23));
|
||||
@@ -340,12 +349,11 @@ w83877f_read(uint16_t port, void *priv)
|
||||
{
|
||||
w83877f_t *dev = (w83877f_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
uint8_t index = (port & 1) ? 0 : 1;
|
||||
|
||||
if (dev->locked) {
|
||||
if (index)
|
||||
if ((port == 0x3f0) || (port == 0x251))
|
||||
ret = dev->cur_reg;
|
||||
else {
|
||||
else if ((port == 0x3f1) || (port == 0x252)) {
|
||||
if (dev->cur_reg == 7)
|
||||
ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2));
|
||||
else if ((dev->cur_reg >= 0x18) || !dev->rw_locked)
|
||||
|
@@ -9,13 +9,13 @@
|
||||
* Emulation of select Cirrus Logic cards (CL-GD 5428,
|
||||
* CL-GD 5429, CL-GD 5430, CL-GD 5434 and CL-GD 5436 are supported).
|
||||
*
|
||||
* Version: @(#)vid_cl_54xx.c 1.0.31 2019/12/03
|
||||
* Version: @(#)vid_cl_54xx.c 1.0.32 2020/01/11
|
||||
*
|
||||
* Authors: TheCollector1995,
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2016-2019 TheCollector1995.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2016-2020 TheCollector1995.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
@@ -334,7 +334,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *p)
|
||||
if (val == 0x12)
|
||||
svga->seqregs[6] = 0x12;
|
||||
else
|
||||
svga->seqregs[6] = (svga->crtc[0x27] >= CIRRUS_ID_CLGD5446) ? 0xff : 0x0f;
|
||||
svga->seqregs[6] = 0x0f;
|
||||
if (svga->crtc[0x27] < CIRRUS_ID_CLGD5429)
|
||||
gd54xx->unlocked = (svga->seqregs[6] == 0x12);
|
||||
break;
|
||||
|
Reference in New Issue
Block a user