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Merge pull request #998 from tiseno100/master

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Full Intel 82335 rewrite
This commit is contained in:
Miran Grča
2020-09-11 01:56:40 +02:00
committed by GitHub
parent 2569bcbf43 f582d4b432
commit 97f7682e6f
5 changed files with 173 additions and 202 deletions
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197
src/chipset/i82335.c
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@@ -1,197 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 82335(KU82335) chipset.
*
*
*
* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2020 Sarah Walker.
* Copyright 2016-2020 Miran Grca.
* Copyright 2020 Tiseno100
*
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/chipset.h>
typedef struct
{
uint8_t reg_22;
uint8_t reg_23;
} i82335_t;
static uint8_t i82335_read(uint16_t addr, void *priv);
static void
i82335_write(uint16_t addr, uint8_t val, void *priv)
{
i82335_t *dev = (i82335_t *) priv;
int mem_write = 0;
switch (addr)
{
case 0x22:
if ((val ^ dev->reg_22) & 1)
{
if (val & 1)
{
for (int i = 0; i < 8; i++)
{
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
shadowbios = 1;
}
}
else
{
for (int i = 0; i < 8; i++)
{
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
shadowbios = 0;
}
}
flushmmucache();
}
dev->reg_22 = val | 0xd8;
break;
case 0x23:
dev->reg_23 = val;
if ((val ^ dev->reg_22) & 2)
{
if (val & 2)
{
for (int i = 0; i < 8; i++)
{
mem_set_mem_state(0xc0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
shadowbios = 1;
}
}
else
{
for (int i = 0; i < 8; i++)
{
mem_set_mem_state(0xc0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
shadowbios = 0;
}
}
}
if ((val ^ dev->reg_22) & 0xc)
{
if (val & 2)
{
for (int i = 0; i < 8; i++)
{
mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
mem_set_mem_state(0xa0000, 0x20000, MEM_READ_INTERNAL | mem_write);
shadowbios = 1;
}
}
else
{
for (int i = 0; i < 8; i++)
{
mem_write = (val & 8) ? MEM_WRITE_DISABLED : MEM_WRITE_EXTANY;
mem_set_mem_state(0xa0000, 0x20000, MEM_READ_EXTANY | mem_write);
shadowbios = 0;
}
}
}
if ((val ^ dev->reg_22) & 0xe)
{
flushmmucache();
}
if (val & 0x80)
{
io_removehandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL);
io_removehandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, NULL);
}
break;
}
}
static uint8_t
i82335_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
i82335_t *dev = (i82335_t *) priv;
switch(addr){
case 0x22:
return dev->reg_22;
break;
case 0x23:
return dev->reg_23;
break;
default:
return 0;
break;
}
return ret;
}
static void
i82335_close(void *priv)
{
i82335_t *dev = (i82335_t *) priv;
free(dev);
}
static void *
i82335_init(const device_t *info)
{
i82335_t *dev = (i82335_t *) malloc(sizeof(i82335_t));
memset(dev, 0, sizeof(i82335_t));
dev->reg_22 = 0xd8;
io_sethandler(0x0022, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev);
io_sethandler(0x0023, 0x0001, i82335_read, NULL, NULL, i82335_write, NULL, NULL, dev);
return dev;
}
const device_t i82335_device = {
"Intel 82335",
0,
0,
i82335_init, i82335_close, NULL,
NULL, NULL, NULL,
NULL
};

169
src/chipset/intel_82335.c Normal file
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@@ -0,0 +1,169 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Intel 82335(KU82335) chipset.
*
* Copyright 2020 Tiseno100
*
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/port_92.h>
#include <86box/chipset.h>
#define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
#define rw_shadow (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL)
#define ro_shadow (MEM_READ_INTERNAL | MEM_WRITE_DISABLED)
#define extended_granuality_enabled (dev->regs[0x2c] & 0x01)
#define determine_video_ram_write_access ((dev->regs[0x22] & (0x08 << 8)) ? rw_shadow : ro_shadow)
typedef struct
{
uint16_t regs[256],
cfg_locked;
} intel_82335_t;
#ifdef ENABLE_INTEL_82335_LOG
int intel_82335_do_log = ENABLE_INTEL_82335_LOG;
static void
intel_82335_log(const char *fmt, ...)
{
va_list ap;
if (intel_82335_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define intel_82335_log(fmt, ...)
#endif
static void
intel_82335_write(uint16_t addr, uint16_t val, void *priv)
{
intel_82335_t *dev = (intel_82335_t *) priv;
uint32_t base, i;
dev->regs[addr] = val;
dev->cfg_locked = (dev->regs[0x22] & (0x80 << 8));
if(!dev->cfg_locked)
{
intel_82335_log("Register %02x: Write %04x\n", addr, val);
switch (addr) {
case 0x22:
if (!extended_granuality_enabled)
{
mem_set_mem_state_both(0xa0000, 0x20000, (dev->regs[0x22] & (0x04 << 8)) ? determine_video_ram_write_access : disabled_shadow);
mem_set_mem_state_both(0xc0000, 0x20000, (dev->regs[0x22] & (0x02 << 8)) ? rw_shadow : disabled_shadow);
mem_set_mem_state_both(0xe0000, 0x20000, (dev->regs[0x22] & 0x01) ? rw_shadow : disabled_shadow);
}
break;
case 0x2e:
if(extended_granuality_enabled)
{
for(i=0; i<8; i++)
{
base = 0xc0000 + (i << 15);
mem_set_mem_state_both(base, 0x8000, (dev->regs[0x2e] & (1 << (i+8))) ? ((dev->regs[0x2e] & (1 << i)) ? ro_shadow : rw_shadow) : disabled_shadow);
}
break;
}
}
}
}
static uint16_t
intel_82335_read(uint16_t addr, void *priv)
{
intel_82335_t *dev = (intel_82335_t *) priv;
intel_82335_log("Register %02x: Reading\n", addr);
return dev->regs[addr];
}
static void
intel_82335_close(void *priv)
{
intel_82335_t *dev = (intel_82335_t *) priv;
free(dev);
}
static void *
intel_82335_init(const device_t *info)
{
intel_82335_t *dev = (intel_82335_t *) malloc(sizeof(intel_82335_t));
memset(dev, 0, sizeof(intel_82335_t));
device_add(&port_92_device);
memset(dev->regs, 0, sizeof(dev->regs));
dev->regs[0x28] = 0xf9;
dev->cfg_locked = 1;
/* Memory Configuration */
io_sethandler(0x0022, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
/* Roll Comparison */
io_sethandler(0x0024, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
io_sethandler(0x0026, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
/* Address Range Comparison */
io_sethandler(0x0028, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
io_sethandler(0x002a, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
/* Granuality Enable */
io_sethandler(0x002c, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
/* Extended Granuality */
io_sethandler(0x002e, 0x0001, NULL, intel_82335_read, NULL, NULL, intel_82335_write, NULL, dev);
return dev;
}
const device_t intel_82335_device = {
"Intel 82335",
0,
0,
intel_82335_init, intel_82335_close, NULL,
NULL, NULL, NULL,
NULL
};

2
src/include/86box/chipset.h
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@@ -45,7 +45,7 @@ extern const device_t headland_ht18b_device;
extern const device_t headland_ht18c_device; extern const device_t headland_ht18c_device;
/* Intel */ /* Intel */
extern const device_t i82335_device; extern const device_t intel_82335_device;
extern const device_t i420ex_device; extern const device_t i420ex_device;
extern const device_t i420tx_device; extern const device_t i420tx_device;
extern const device_t i420zx_device; extern const device_t i420zx_device;

5
src/machine/m_at_286_386sx.c
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@@ -222,7 +222,6 @@ machine_at_px286_init(const machine_t *model)
return ret; return ret;
} }
int int
machine_at_goldstar386_init(const machine_t *model) machine_at_goldstar386_init(const machine_t *model)
{ {
@@ -440,7 +439,7 @@ machine_at_shuttle386sx_init(const machine_t *model)
machine_at_common_init(model); machine_at_common_init(model);
device_add(&i82335_device); device_add(&intel_82335_device);
device_add(&keyboard_at_ami_device); device_add(&keyboard_at_ami_device);
device_add(&fdc_at_device); device_add(&fdc_at_device);
@@ -462,7 +461,7 @@ machine_at_adi386sx_init(const machine_t *model)
machine_at_common_init(model); machine_at_common_init(model);
device_add(&i82335_device); device_add(&intel_82335_device);
device_add(&keyboard_at_ami_device); device_add(&keyboard_at_ami_device);
device_add(&fdc_at_device); device_add(&fdc_at_device);

2
src/win/Makefile.mingw
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@@ -625,7 +625,7 @@ CPUOBJ := cpu.o cpu_table.o \
x86seg.o x87.o x87_timings.o \ x86seg.o x87.o x87_timings.o \
$(DYNARECOBJ) $(DYNARECOBJ)
CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o cs4031.o \ CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o intel_82335.o cs4031.o \
intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \ intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \
neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o via_vt82c49x.o via_vt82c505.o \ neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o via_vt82c49x.o via_vt82c505.o \
sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o umc491.o \ sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o umc491.o \