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Reindented and fixed a bug in chipset/umc_8886.c.

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This commit is contained in:
OBattler
2021-04-29 19:57:01 +02:00
parent 37dc30029f
commit 9802dfabff
1 changed files with 101 additions and 102 deletions
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37
src/chipset/umc_8886.c
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@@ -11,14 +11,12 @@
* Note: This chipset has no datasheet, everything were done via * Note: This chipset has no datasheet, everything were done via
* reverse engineering the BIOS of various machines using it. * reverse engineering the BIOS of various machines using it.
* *
*
* Authors: Tiseno100, * Authors: Tiseno100,
* *
* Copyright 2021 Tiseno100. * Copyright 2021 Tiseno100.
*/ */
/* /* UMC 8886 Configuration Registers
UMC 8886 Configuration Registers
TODO: TODO:
- More Appropriate Bitmasking(If it's even possible) - More Appropriate Bitmasking(If it's even possible)
@@ -75,6 +73,7 @@ Bit 0: Enable Internal IDE
#include <86box/chipset.h> #include <86box/chipset.h>
#ifdef ENABLE_UMC_8886_LOG #ifdef ENABLE_UMC_8886_LOG
int umc_8886_do_log = ENABLE_UMC_8886_LOG; int umc_8886_do_log = ENABLE_UMC_8886_LOG;
static void static void
@@ -93,6 +92,7 @@ umc_8886_log(const char *fmt, ...)
#define umc_8886_log(fmt, ...) #define umc_8886_log(fmt, ...)
#endif #endif
/* PCI IRQ Flags */ /* PCI IRQ Flags */
#define INTA (PCI_INTA + (2 * !(addr & 1))) #define INTA (PCI_INTA + (2 * !(addr & 1)))
#define INTB (PCI_INTB + (2 * !(addr & 1))) #define INTB (PCI_INTB + (2 * !(addr & 1)))
@@ -105,6 +105,7 @@ umc_8886_log(const char *fmt, ...)
/* Southbridge Revision */ /* Southbridge Revision */
#define SB_ID dev->sb_id #define SB_ID dev->sb_id
typedef struct umc_8886_t typedef struct umc_8886_t
{ {
uint8_t pci_conf_sb[2][256]; /* PCI Registers */ uint8_t pci_conf_sb[2][256]; /* PCI Registers */
@@ -112,32 +113,30 @@ typedef struct umc_8886_t
int has_ide; /* Check if Southbridge Revision is AF or F */ int has_ide; /* Check if Southbridge Revision is AF or F */
} umc_8886_t; } umc_8886_t;
void umc_8886_ide_handler(int status)
static void
umc_8886_ide_handler(int status)
{ {
ide_pri_disable(); ide_pri_disable();
ide_sec_disable(); ide_sec_disable();
if (status) if (status) {
{
ide_pri_enable(); ide_pri_enable();
ide_sec_enable(); ide_sec_enable();
} }
} }
static void static void
um8886_write(int func, int addr, uint8_t val, void *priv) um8886_write(int func, int addr, uint8_t val, void *priv)
{ {
umc_8886_t *dev = (umc_8886_t *)priv; umc_8886_t *dev = (umc_8886_t *)priv;
umc_8886_log("UM8886: dev->regs[%02x] = %02x (%02x)\n", addr, val, func); umc_8886_log("UM8886: dev->regs[%02x] = %02x (%02x)\n", addr, val, func);
if (addr > 3) /* We don't know the RW status of registers but Phoenix writes on some RO registers too*/ /* We don't know the RW status of registers but Phoenix writes on some RO registers too*/
if (addr > 3) switch (func) {
switch (func)
{
case 0: /* Southbridge */ case 0: /* Southbridge */
switch (addr) switch (addr) {
{
case 0x43: case 0x43:
case 0x44: case 0x44:
dev->pci_conf_sb[func][addr] = val; dev->pci_conf_sb[func][addr] = val;
@@ -155,8 +154,7 @@ um8886_write(int func, int addr, uint8_t val, void *priv)
case 0x56: case 0x56:
dev->pci_conf_sb[func][addr] = val; dev->pci_conf_sb[func][addr] = val;
switch (val & 2) switch (val & 2) {
{
case 0: case 0:
cpu_set_isa_pci_div(3); cpu_set_isa_pci_div(3);
break; break;
@@ -207,6 +205,7 @@ um8886_write(int func, int addr, uint8_t val, void *priv)
} }
} }
static uint8_t static uint8_t
um8886_read(int func, int addr, void *priv) um8886_read(int func, int addr, void *priv)
{ {
@@ -214,6 +213,7 @@ um8886_read(int func, int addr, void *priv)
return dev->pci_conf_sb[func][addr]; return dev->pci_conf_sb[func][addr];
} }
static void static void
umc_8886_reset(void *priv) umc_8886_reset(void *priv)
{ {
@@ -235,14 +235,13 @@ umc_8886_reset(void *priv)
for (int i = 1; i < 5; i++) /* Disable all IRQ interrupts */ for (int i = 1; i < 5; i++) /* Disable all IRQ interrupts */
pci_set_irq_routing(i, PCI_IRQ_DISABLED); pci_set_irq_routing(i, PCI_IRQ_DISABLED);
if (HAS_IDE) if (HAS_IDE) {
{
dev->pci_conf_sb[1][4] = 1; /* Start with Internal IDE Enabled */ dev->pci_conf_sb[1][4] = 1; /* Start with Internal IDE Enabled */
umc_8886_ide_handler(1); umc_8886_ide_handler(1);
} }
} }
static void static void
umc_8886_close(void *priv) umc_8886_close(void *priv)
{ {
@@ -257,7 +256,7 @@ umc_8886_init(const device_t *info)
umc_8886_t *dev = (umc_8886_t *)malloc(sizeof(umc_8886_t)); umc_8886_t *dev = (umc_8886_t *)malloc(sizeof(umc_8886_t));
memset(dev, 0, sizeof(umc_8886_t)); memset(dev, 0, sizeof(umc_8886_t));
dev->has_ide = (info->local && 0x886a); dev->has_ide = (info->local == 0x886a);
pci_add_card(PCI_ADD_SOUTHBRIDGE, um8886_read, um8886_write, dev); /* Device 12: UMC 8886xx */ pci_add_card(PCI_ADD_SOUTHBRIDGE, um8886_read, um8886_write, dev); /* Device 12: UMC 8886xx */
/* Add IDE if UM8886AF variant */ /* Add IDE if UM8886AF variant */