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Rewrite UM8669F Super I/O to use the ISAPnP framework

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This commit is contained in:
RichardG867
2021-04-02 23:48:23 -03:00
parent a4af5ccfa8
commit 985e498d6d
2 changed files with 175 additions and 193 deletions
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365
src/sio/sio_um8669f.c
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@@ -1,31 +1,30 @@
/*um8669f :
aa to 108 unlocks
next 108 write is register select (Cx?)
data read/write to 109
55 to 108 locks
C1
bit 7 - enable PnP registers
PnP registers :
07 - device :
0 = FDC
1 = COM1
2 = COM2
3 = LPT1
5 = Game port
30 - enable
60/61 - addr
70 - IRQ
74 - DMA*/
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the UMC UM8669F Super I/O chip.
*
*
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* RichardG, <richardg867@gmail.com>
*
* Copyright 2008-2021 Sarah Walker.
* Copyright 2016-2021 Miran Grca.
* Copyright 2021 RichardG.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
@@ -35,37 +34,94 @@ PnP registers :
#include <86box/serial.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/gameport.h>
#include <86box/sio.h>
#include <86box/isapnp.h>
#define DEV_FDC 0
#define DEV_COM1 1
#define DEV_COM2 2
#define DEV_LPT1 3
#define DEV_GAME 5
/* This ROM is reconstructed out of the several assumptions, some of which based on the IT8671F. */
static uint8_t um8669f_pnp_rom[] = {
0x55, 0xa3, 0x86, 0x69, 0x00, 0x00, 0x00, 0x00, 0x00, /* UMC8669, dummy checksum (filled in by isapnp_add_card) */
0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */
#define REG_DEVICE 0x07
#define REG_ENABLE 0x30
#define REG_ADDRHI 0x60
#define REG_ADDRLO 0x61
#define REG_IRQ 0x70
#define REG_DMA 0x74
0x15, 0x41, 0xd0, 0x07, 0x00, 0x01, /* logical device PNP0700, can participate in boot */
0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */
0x2a, 0x0f, 0x0c, /* DMA 0/1/2/3, compatibility, no count by word, count by byte, is bus master, 8-bit only */
0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */
0x15, 0x41, 0xd0, 0x05, 0x01, 0x01, /* logical device PNP0501, can participate in boot */
0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */
0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */
0x15, 0x41, 0xd0, 0x05, 0x01, 0x01, /* logical device PNP0501, can participate in boot */
0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */
0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */
0x15, 0x41, 0xd0, 0x04, 0x00, 0x01, /* logical device PNP0400, can participate in boot */
0x22, 0xfa, 0x1f, /* IRQ 1/3/4/5/6/7/8/9/10/11/12 */
0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */
0x15, 0x55, 0xa3, 0x86, 0x69, 0x00, /* logical device UMC8669 (just a dummy to create a gap in LDNs) */
0x15, 0x41, 0xd0, 0xb0, 0x2f, 0x01, /* logical device PNPB02F, can participate in boot */
0x47, 0x00, 0x00, 0x01, 0xf8, 0x03, 0x08, 0x08, /* I/O 0x100-0x3F8, decodes 10-bit, 8-byte alignment, 8 addresses */
0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */
};
static const isapnp_device_config_t um8669f_pnp_defaults[] = {
{
.activate = 1,
.io = { { .base = 0x03f0 }, },
.irq = { { .irq = 6 }, },
.dma = { { .dma = 2 }, }
}, {
.activate = 1,
.io = { { .base = 0x03f8 }, },
.irq = { { .irq = 4 }, }
}, {
.activate = 1,
.io = { { .base = 0x02f8 }, },
.irq = { { .irq = 3 }, }
}, {
.activate = 1,
.io = { { .base = 0x0378 }, },
.irq = { { .irq = 7 }, }
}, {
.activate = 0
}, {
.activate = 1,
.io = { { .base = 0x200 }, }
}
};
#ifdef ENABLE_UM8669F_LOG
int um8669f_do_log = ENABLE_UM8669F_LOG;
static void
um8669f_log(const char *fmt, ...)
{
va_list ap;
if (um8669f_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
#define um8669f_log(fmt, ...)
#endif
typedef struct um8669f_t
{
int locked, cur_reg_108,
cur_reg, cur_device,
pnp_active;
int locked, cur_reg_108;
void *pnp_card;
isapnp_device_config_t *pnp_config[5];
uint8_t regs_108[256];
struct {
int enable;
uint16_t addr;
int irq;
int dma;
} dev[8];
fdc_t *fdc;
serial_t *uart[2];
@@ -73,111 +129,64 @@ typedef struct um8669f_t
static void
um8669f_pnp_write(uint16_t port, uint8_t val, void *priv)
um8669f_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv)
{
um8669f_t *dev = (um8669f_t *) priv;
uint8_t valxor = 0;
uint8_t lpt_irq = 0xff;
if (port == 0x279)
dev->cur_reg = val;
else {
if (dev->cur_reg == REG_DEVICE)
dev->cur_device = val & 7;
else {
switch (dev->cur_reg) {
case REG_ENABLE:
valxor = dev->dev[dev->cur_device].enable ^ val;
dev->dev[dev->cur_device].enable = val;
break;
case REG_ADDRLO:
valxor = (dev->dev[dev->cur_device].addr & 0xff) ^ val;
dev->dev[dev->cur_device].addr = (dev->dev[dev->cur_device].addr & 0xff00) | val;
break;
case REG_ADDRHI:
valxor = ((dev->dev[dev->cur_device].addr >> 8) & 0xff) ^ val;
dev->dev[dev->cur_device].addr = (dev->dev[dev->cur_device].addr & 0x00ff) | (val << 8);
break;
case REG_IRQ:
valxor = dev->dev[dev->cur_device].irq ^ val;
dev->dev[dev->cur_device].irq = val;
break;
case REG_DMA:
valxor = dev->dev[dev->cur_device].dma ^ val;
dev->dev[dev->cur_device].dma = val;
break;
default:
valxor = 0;
break;
}
switch (dev->cur_device) {
case DEV_FDC:
if (valxor) {
fdc_remove(dev->fdc);
if (dev->dev[DEV_FDC].enable & 1)
fdc_set_base(dev->fdc, dev->dev[DEV_FDC].addr);
}
break;
case DEV_COM1:
if (valxor) {
serial_remove(dev->uart[0]);
if (dev->dev[DEV_COM1].enable & 1)
serial_setup(dev->uart[0], dev->dev[DEV_COM1].addr, dev->dev[DEV_COM1].irq);
}
break;
case DEV_COM2:
if (valxor) {
serial_remove(dev->uart[1]);
if (dev->dev[DEV_COM2].enable & 1)
serial_setup(dev->uart[1], dev->dev[DEV_COM2].addr, dev->dev[DEV_COM2].irq);
}
break;
case DEV_LPT1:
if (valxor) {
lpt1_remove();
if (dev->dev[DEV_LPT1].enable & 1)
lpt1_init(dev->dev[DEV_LPT1].addr);
}
if (dev->dev[DEV_LPT1].irq <= 15)
lpt_irq = dev->dev[DEV_LPT1].irq;
lpt1_irq(lpt_irq);
break;
}
}
}
}
static uint8_t
um8669f_pnp_read(uint16_t port, void *priv)
{
um8669f_t *dev = (um8669f_t *) priv;
uint8_t ret = 0xff;
switch (dev->cur_reg) {
case REG_DEVICE:
ret = dev->cur_device;
break;
case REG_ENABLE:
ret = dev->dev[dev->cur_device].enable;
break;
case REG_ADDRLO:
ret = dev->dev[dev->cur_device].addr & 0xff;
break;
case REG_ADDRHI:
ret = dev->dev[dev->cur_device].addr >> 8;
break;
case REG_IRQ:
ret = dev->dev[dev->cur_device].irq;
break;
case REG_DMA:
ret = dev->dev[dev->cur_device].dma;
break;
if (ld > 5) {
um8669f_log("UM8669F: Unknown logical device %d\n", ld);
return;
}
return ret;
um8669f_t *dev = (um8669f_t *) priv;
switch (ld) {
case 0:
fdc_remove(dev->fdc);
if (config->activate) {
um8669f_log("UM8669F: FDC enabled at port %04X IRQ %d DMA %d\n", config->io[0].base, config->irq[0].irq, (config->dma[0].dma == ISAPNP_DMA_DISABLED) ? -1 : config->dma[0].dma);
if (config->io[0].base != ISAPNP_IO_DISABLED)
fdc_set_base(dev->fdc, config->io[0].base);
fdc_set_irq(dev->fdc, config->irq[0].irq);
fdc_set_dma_ch(dev->fdc, (config->dma[0].dma == ISAPNP_DMA_DISABLED) ? -1 : config->dma[0].dma);
} else
um8669f_log("UM8669F: FDC disabled\n");
break;
case 1:
case 2:
serial_remove(dev->uart[ld - 1]);
if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) {
um8669f_log("UM8669F: UART %d enabled at port %04X IRQ %d\n", ld - 1, config->io[0].base, config->irq[0].irq);
serial_setup(dev->uart[ld - 1], config->io[0].base, config->irq[0].irq);
} else
um8669f_log("UM8669F: UART %d disabled\n", ld - 1);
break;
case 3:
lpt1_remove();
if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) {
um8669f_log("UM8669F: LPT enabled at port %04X IRQ %d\n", config->io[0].base, config->irq[0].irq);
lpt1_init(config->io[0].base);
} else
um8669f_log("UM8669F: LPT disabled\n");
break;
case 5:
gameport_remap(0);
if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) {
um8669f_log("UM8669F: Game port enabled at port %04X\n", config->io[0].base);
gameport_remap(config->io[0].base);
} else
um8669f_log("UM8669F: Game port disabled\n");
}
}
@@ -185,7 +194,8 @@ void
um8669f_write(uint16_t port, uint8_t val, void *priv)
{
um8669f_t *dev = (um8669f_t *) priv;
int new_pnp_active;
um8669f_log("UM8669F: write(%04X, %02X)\n", port, val);
if (dev->locked) {
if ((port == 0x108) && (val == 0xaa))
@@ -200,26 +210,8 @@ um8669f_write(uint16_t port, uint8_t val, void *priv)
dev->regs_108[dev->cur_reg_108] = val;
if (dev->cur_reg_108 == 0xc1) {
new_pnp_active = !!(dev->regs_108[0xc1] & 0x80);
if (new_pnp_active != dev->pnp_active) {
io_removehandler(0x0279, 0x0001,
NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
io_removehandler(0x0a79, 0x0001,
NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
io_removehandler(0x03e3, 0x0001,
um8669f_pnp_read, NULL, NULL, NULL, NULL, NULL, dev);
if (new_pnp_active) {
io_sethandler(0x0279, 0x0001,
NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
io_sethandler(0x0a79, 0x0001,
NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
io_sethandler(0x03e3, 0x0001,
um8669f_pnp_read, NULL, NULL, NULL, NULL, NULL, dev);
}
dev->pnp_active = new_pnp_active;
}
um8669f_log("UM8669F: ISAPnP %sabled\n", (val & 0x80) ? "en" : "dis");
isapnp_enable_card(dev->pnp_card, (val & 0x80) ? 2 : 0);
}
}
}
@@ -239,6 +231,8 @@ um8669f_read(uint16_t port, void *priv)
ret = dev->regs_108[dev->cur_reg_108];
}
um8669f_log("UM8669F: read(%04X) = %02X\n", port, ret);
return ret;
}
@@ -246,42 +240,21 @@ um8669f_read(uint16_t port, void *priv)
void
um8669f_reset(um8669f_t *dev)
{
um8669f_log("UM8669F: reset()\n");
fdc_reset(dev->fdc);
serial_remove(dev->uart[0]);
serial_setup(dev->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
serial_remove(dev->uart[1]);
serial_setup(dev->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
lpt1_remove();
lpt1_init(0x378);
if (dev->pnp_active) {
io_removehandler(0x0279, 0x0001, NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
io_removehandler(0x0a79, 0x0001, NULL, NULL, NULL, um8669f_pnp_write, NULL, NULL, dev);
io_removehandler(0x03e3, 0x0001, um8669f_pnp_read, NULL, NULL, NULL, NULL, NULL, dev);
dev->pnp_active = 0;
}
isapnp_enable_card(dev->pnp_card, 0);
dev->locked = 1;
dev->dev[DEV_FDC].enable = 1;
dev->dev[DEV_FDC].addr = 0x03f0;
dev->dev[DEV_FDC].irq = 6;
dev->dev[DEV_FDC].dma = 2;
dev->dev[DEV_COM1].enable = 1;
dev->dev[DEV_COM1].addr = 0x03f8;
dev->dev[DEV_COM1].irq = 4;
dev->dev[DEV_COM2].enable = 1;
dev->dev[DEV_COM2].addr = 0x02f8;
dev->dev[DEV_COM2].irq = 3;
dev->dev[DEV_LPT1].enable = 1;
dev->dev[DEV_LPT1].addr = 0x0378;
dev->dev[DEV_LPT1].irq = 7;
isapnp_reset_card(dev->pnp_card);
}
@@ -290,6 +263,8 @@ um8669f_close(void *priv)
{
um8669f_t *dev = (um8669f_t *) priv;
um8669f_log("UM8669F: close()\n");
free(dev);
}
@@ -297,9 +272,15 @@ um8669f_close(void *priv)
static void *
um8669f_init(const device_t *info)
{
um8669f_log("UM8669F: init()\n");
um8669f_t *dev = (um8669f_t *) malloc(sizeof(um8669f_t));
memset(dev, 0, sizeof(um8669f_t));
dev->pnp_card = isapnp_add_card(um8669f_pnp_rom, sizeof(um8669f_pnp_rom), um8669f_pnp_config_changed, NULL, NULL, NULL, dev);
for (uint8_t i = 0; i < (sizeof(um8669f_pnp_defaults) / sizeof(isapnp_device_config_t)); i++)
isapnp_set_device_defaults(dev->pnp_card, i, &um8669f_pnp_defaults[i]);
dev->fdc = device_add(&fdc_at_smc_device);
dev->uart[0] = device_add_inst(&ns16550_device, 1);

3
src/sio/sio_vt82c686.c
View File

@@ -11,6 +11,7 @@
*
*
* Author: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.
*/
#include <stdio.h>
@@ -149,7 +150,7 @@ vt82c686_read(uint16_t port, void *priv)
{
vt82c686_t *dev = (vt82c686_t *) priv;
uint8_t ret = 0xff;
/* NOTE: Registers are [0xE0:0xFF] but we store them as [0x00:0x1F]. */
if (!(port & 1))
ret = dev->cur_reg;