More changes to the BT485 RAM DAC emulation - now emulates the whole family (BT484, BT485, BT485A, and the AT&T clones of the BT484 and BT485).
This commit is contained in:
@@ -9,7 +9,7 @@
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* Emulation of the Brooktree BT485 and BT485A true colour
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* RAM DAC's.
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*
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* Version: @(#)vid_bt485_ramdac.c 1.0.7 2018/10/03
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* Version: @(#)vid_bt485_ramdac.c 1.0.8 2018/10/03
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* TheCollector1995,
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@@ -106,7 +106,7 @@ bt485_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, bt485_ramdac_t *r
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break;
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case 0x06: /* Command Register 0 (RS value = 0110) */
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ramdac->cr0 = val;
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svga->ramdac_type = (val & 0x01) ? RAMDAC_8BIT : RAMDAC_6BIT;
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svga->ramdac_type = (val & 0x02) ? RAMDAC_8BIT : RAMDAC_6BIT;
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break;
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case 0x08: /* Command Register 1 (RS value = 1000) */
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ramdac->cr1 = val;
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@@ -118,19 +118,31 @@ bt485_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, bt485_ramdac_t *r
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bt485_set_bpp(ramdac, svga);
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break;
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case 0x0a:
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if (ramdac->cr0 & 0x80) {
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if ((ramdac->type == BT485) || (svga->dac_pos == 1)) {
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/* Command Register 3 (RS value = 1010) */
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ramdac->cr3 = val;
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svga->hwcursor.xsize = svga->hwcursor.ysize = (val & 4) ? 64 : 32;
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svga->hwcursor.yoff = (svga->hwcursor.ysize == 32) ? 32 : 0;
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svga->hwcursor.x = ramdac->hwc_x - svga->hwcursor.xsize;
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svga->hwcursor.y = ramdac->hwc_y - svga->hwcursor.ysize;
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if (svga->hwcursor.xsize == 64)
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svga->dac_pos = (svga->dac_pos & 0x00ff) | ((val & 0x03) << 8);
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svga_recalctimings(svga);
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} else if (svga->dac_pos == 2)
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ramdac->cr4 = val;
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if ((ramdac->type >= BT485) && (ramdac->cr0 & 0x80)) {
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switch (svga->dac_pos) {
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case 0x01:
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/* Command Register 3 (RS value = 1010) */
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ramdac->cr3 = val;
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svga->hwcursor.xsize = svga->hwcursor.ysize = (val & 4) ? 64 : 32;
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svga->hwcursor.yoff = (svga->hwcursor.ysize == 32) ? 32 : 0;
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svga->hwcursor.x = ramdac->hwc_x - svga->hwcursor.xsize;
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svga->hwcursor.y = ramdac->hwc_y - svga->hwcursor.ysize;
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if (svga->hwcursor.xsize == 64)
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svga->dac_pos = (svga->dac_pos & 0x00ff) | ((val & 0x03) << 8);
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svga_recalctimings(svga);
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break;
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case 0x02:
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case 0x20:
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case 0x21:
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case 0x22:
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if (ramdac->type != BT485A)
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break;
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else if (svga->dac_pos == 2) {
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ramdac->cr4 = val;;
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break;
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}
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break;
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}
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}
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break;
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case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */
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@@ -210,21 +222,32 @@ bt485_ramdac_in(uint16_t addr, int rs2, int rs3, bt485_ramdac_t *ramdac, svga_t
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temp = ramdac->cr2;
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break;
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case 0x0a:
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if (ramdac->cr0 & 0x80) {
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if ((ramdac->type == BT485) || (svga->dac_pos == 1))
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temp = ramdac->cr3;
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else if (svga->dac_pos == 2)
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temp = ramdac->cr4;
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else if ((svga->dac_pos & 0xf0) == 0x20) {
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/* TODO: Red, Green, and Blue Signature Analysis Registers */
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temp = 0xff;
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if ((ramdac->type >= BT485) && (ramdac->cr0 & 0x80)) {
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switch (svga->dac_pos) {
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case 0x00:
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temp = ramdac->status;
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break;
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case 0x01:
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temp = ramdac->cr3;
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break;
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case 0x02:
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case 0x20:
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case 0x21:
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case 0x22:
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if (ramdac->type != BT485A)
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break;
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else if (svga->dac_pos == 2) {
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temp = ramdac->cr4;
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break;
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} else {
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/* TODO: Red, Green, and Blue Signature Analysis Registers */
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temp = 0xff;
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break;
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}
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break;
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}
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} else
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if (ramdac->type == BT485)
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temp = 0x60; /*Bt485*/
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else
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temp = 0x20; /*Bt485A*/
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/* Datasheet says bits 7,6 = 01, bits 5,4 = revision */
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temp = ramdac->status;
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break;
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case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */
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if (svga->hwcursor.xsize == 64)
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@@ -254,8 +277,37 @@ bt485_ramdac_in(uint16_t addr, int rs2, int rs3, bt485_ramdac_t *ramdac, svga_t
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return temp;
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}
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void bt485_init(bt485_ramdac_t *ramdac, uint8_t type)
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void bt485_init(bt485_ramdac_t *ramdac, svga_t *svga, uint8_t type)
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{
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memset(ramdac, 0, sizeof(bt485_ramdac_t));
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ramdac->type = type;
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if (ramdac->type < BT485) {
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/* The BT484 and AT&T 20C504 only have a 32x32 cursor. */
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svga->hwcursor.xsize = svga->hwcursor.ysize = 32;
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svga->hwcursor.yoff = 32;
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}
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/* Set the RAM DAC status byte to the correct ID bits.
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Both the BT484 and BT485 datasheets say this:
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SR7-SR6: These bits are identification values. SR7=0 and SR6=1.
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But all other sources seem to assume SR7=1 and SR6=0. */
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switch (ramdac->type) {
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case BT484:
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ramdac->status = 0x80;
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break;
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case ATT20C504:
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ramdac->status = 0x40;
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break;
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case BT485:
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ramdac->status = 0xa0;
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break;
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case ATT20C505:
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ramdac->status = 0xd0;
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break;
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case BT485A:
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ramdac->status = 0x20;
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break;
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}
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}
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@@ -9,7 +9,7 @@
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* Header of the emulation of the Brooktree BT485 and BT485A
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* true colour RAM DAC's.
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*
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* Version: @(#)vid_bt485_ramdac.h 1.0.0 2018/10/03
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* Version: @(#)vid_bt485_ramdac.h 1.0.1 2018/10/03
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* TheCollector1995,
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@@ -29,14 +29,18 @@ typedef struct bt485_ramdac_t
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uint8_t cr2;
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uint8_t cr3;
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uint8_t cr4;
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uint8_t status;
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uint8_t type;
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} bt485_ramdac_t;
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enum {
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BT485 = 0,
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BT484 = 0,
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ATT20C504,
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BT485,
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ATT20C505,
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BT485A
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};
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extern void bt485_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, bt485_ramdac_t *ramdac, svga_t *svga);
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extern uint8_t bt485_ramdac_in(uint16_t addr, int rs2, int rs3, bt485_ramdac_t *ramdac, svga_t *svga);
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extern void bt485_init(bt485_ramdac_t *ramdac, uint8_t type);
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extern void bt485_init(bt485_ramdac_t *ramdac, svga_t *svga, uint8_t type);
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@@ -8,7 +8,7 @@
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*
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* S3 emulation.
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*
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* Version: @(#)vid_s3.c 1.0.23 2018/10/03
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* Version: @(#)vid_s3.c 1.0.24 2018/10/03
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* Miran Grca, <mgrca8@gmail.com>
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@@ -3057,7 +3057,7 @@ static void *s3_init(const device_t *info)
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s3->packed_mmio = 1;
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svga->crtc[0x5a] = 0x0a;
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bt485_init(&s3->bt485_ramdac, BT485);
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bt485_init(&s3->bt485_ramdac, &s3->svga, BT485);
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icd2061_init(&s3->icd2061);
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s3->getclock = icd2061_getclock;
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