More changes to the BT485 RAM DAC emulation - now emulates the whole family (BT484, BT485, BT485A, and the AT&T clones of the BT484 and BT485).

This commit is contained in:
OBattler
2018-10-03 04:18:29 +02:00
parent d1badde7df
commit 988cbe4414
3 changed files with 90 additions and 34 deletions

View File

@@ -9,7 +9,7 @@
* Emulation of the Brooktree BT485 and BT485A true colour
* RAM DAC's.
*
* Version: @(#)vid_bt485_ramdac.c 1.0.7 2018/10/03
* Version: @(#)vid_bt485_ramdac.c 1.0.8 2018/10/03
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* TheCollector1995,
@@ -106,7 +106,7 @@ bt485_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, bt485_ramdac_t *r
break;
case 0x06: /* Command Register 0 (RS value = 0110) */
ramdac->cr0 = val;
svga->ramdac_type = (val & 0x01) ? RAMDAC_8BIT : RAMDAC_6BIT;
svga->ramdac_type = (val & 0x02) ? RAMDAC_8BIT : RAMDAC_6BIT;
break;
case 0x08: /* Command Register 1 (RS value = 1000) */
ramdac->cr1 = val;
@@ -118,19 +118,31 @@ bt485_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, bt485_ramdac_t *r
bt485_set_bpp(ramdac, svga);
break;
case 0x0a:
if (ramdac->cr0 & 0x80) {
if ((ramdac->type == BT485) || (svga->dac_pos == 1)) {
/* Command Register 3 (RS value = 1010) */
ramdac->cr3 = val;
svga->hwcursor.xsize = svga->hwcursor.ysize = (val & 4) ? 64 : 32;
svga->hwcursor.yoff = (svga->hwcursor.ysize == 32) ? 32 : 0;
svga->hwcursor.x = ramdac->hwc_x - svga->hwcursor.xsize;
svga->hwcursor.y = ramdac->hwc_y - svga->hwcursor.ysize;
if (svga->hwcursor.xsize == 64)
svga->dac_pos = (svga->dac_pos & 0x00ff) | ((val & 0x03) << 8);
svga_recalctimings(svga);
} else if (svga->dac_pos == 2)
ramdac->cr4 = val;
if ((ramdac->type >= BT485) && (ramdac->cr0 & 0x80)) {
switch (svga->dac_pos) {
case 0x01:
/* Command Register 3 (RS value = 1010) */
ramdac->cr3 = val;
svga->hwcursor.xsize = svga->hwcursor.ysize = (val & 4) ? 64 : 32;
svga->hwcursor.yoff = (svga->hwcursor.ysize == 32) ? 32 : 0;
svga->hwcursor.x = ramdac->hwc_x - svga->hwcursor.xsize;
svga->hwcursor.y = ramdac->hwc_y - svga->hwcursor.ysize;
if (svga->hwcursor.xsize == 64)
svga->dac_pos = (svga->dac_pos & 0x00ff) | ((val & 0x03) << 8);
svga_recalctimings(svga);
break;
case 0x02:
case 0x20:
case 0x21:
case 0x22:
if (ramdac->type != BT485A)
break;
else if (svga->dac_pos == 2) {
ramdac->cr4 = val;;
break;
}
break;
}
}
break;
case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */
@@ -210,21 +222,32 @@ bt485_ramdac_in(uint16_t addr, int rs2, int rs3, bt485_ramdac_t *ramdac, svga_t
temp = ramdac->cr2;
break;
case 0x0a:
if (ramdac->cr0 & 0x80) {
if ((ramdac->type == BT485) || (svga->dac_pos == 1))
temp = ramdac->cr3;
else if (svga->dac_pos == 2)
temp = ramdac->cr4;
else if ((svga->dac_pos & 0xf0) == 0x20) {
/* TODO: Red, Green, and Blue Signature Analysis Registers */
temp = 0xff;
if ((ramdac->type >= BT485) && (ramdac->cr0 & 0x80)) {
switch (svga->dac_pos) {
case 0x00:
temp = ramdac->status;
break;
case 0x01:
temp = ramdac->cr3;
break;
case 0x02:
case 0x20:
case 0x21:
case 0x22:
if (ramdac->type != BT485A)
break;
else if (svga->dac_pos == 2) {
temp = ramdac->cr4;
break;
} else {
/* TODO: Red, Green, and Blue Signature Analysis Registers */
temp = 0xff;
break;
}
break;
}
} else
if (ramdac->type == BT485)
temp = 0x60; /*Bt485*/
else
temp = 0x20; /*Bt485A*/
/* Datasheet says bits 7,6 = 01, bits 5,4 = revision */
temp = ramdac->status;
break;
case 0x0b: /* Cursor RAM Data Register (RS value = 1011) */
if (svga->hwcursor.xsize == 64)
@@ -254,8 +277,37 @@ bt485_ramdac_in(uint16_t addr, int rs2, int rs3, bt485_ramdac_t *ramdac, svga_t
return temp;
}
void bt485_init(bt485_ramdac_t *ramdac, uint8_t type)
void bt485_init(bt485_ramdac_t *ramdac, svga_t *svga, uint8_t type)
{
memset(ramdac, 0, sizeof(bt485_ramdac_t));
ramdac->type = type;
if (ramdac->type < BT485) {
/* The BT484 and AT&T 20C504 only have a 32x32 cursor. */
svga->hwcursor.xsize = svga->hwcursor.ysize = 32;
svga->hwcursor.yoff = 32;
}
/* Set the RAM DAC status byte to the correct ID bits.
Both the BT484 and BT485 datasheets say this:
SR7-SR6: These bits are identification values. SR7=0 and SR6=1.
But all other sources seem to assume SR7=1 and SR6=0. */
switch (ramdac->type) {
case BT484:
ramdac->status = 0x80;
break;
case ATT20C504:
ramdac->status = 0x40;
break;
case BT485:
ramdac->status = 0xa0;
break;
case ATT20C505:
ramdac->status = 0xd0;
break;
case BT485A:
ramdac->status = 0x20;
break;
}
}

View File

@@ -9,7 +9,7 @@
* Header of the emulation of the Brooktree BT485 and BT485A
* true colour RAM DAC's.
*
* Version: @(#)vid_bt485_ramdac.h 1.0.0 2018/10/03
* Version: @(#)vid_bt485_ramdac.h 1.0.1 2018/10/03
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* TheCollector1995,
@@ -29,14 +29,18 @@ typedef struct bt485_ramdac_t
uint8_t cr2;
uint8_t cr3;
uint8_t cr4;
uint8_t status;
uint8_t type;
} bt485_ramdac_t;
enum {
BT485 = 0,
BT484 = 0,
ATT20C504,
BT485,
ATT20C505,
BT485A
};
extern void bt485_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, bt485_ramdac_t *ramdac, svga_t *svga);
extern uint8_t bt485_ramdac_in(uint16_t addr, int rs2, int rs3, bt485_ramdac_t *ramdac, svga_t *svga);
extern void bt485_init(bt485_ramdac_t *ramdac, uint8_t type);
extern void bt485_init(bt485_ramdac_t *ramdac, svga_t *svga, uint8_t type);

View File

@@ -8,7 +8,7 @@
*
* S3 emulation.
*
* Version: @(#)vid_s3.c 1.0.23 2018/10/03
* Version: @(#)vid_s3.c 1.0.24 2018/10/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -3057,7 +3057,7 @@ static void *s3_init(const device_t *info)
s3->packed_mmio = 1;
svga->crtc[0x5a] = 0x0a;
bt485_init(&s3->bt485_ramdac, BT485);
bt485_init(&s3->bt485_ramdac, &s3->svga, BT485);
icd2061_init(&s3->icd2061);
s3->getclock = icd2061_getclock;