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Rewrote the serial port receiver FIFO.

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This commit is contained in:
OBattler
2023-02-15 16:00:46 +01:00
parent 0ed4548aeb
commit 9d59f72f0b
2 changed files with 155 additions and 58 deletions
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204
src/device/serial.c
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@@ -78,10 +78,13 @@ serial_reset_port(serial_t *dev)
dev->iir = dev->ier = dev->lcr = dev->fcr = 0;
dev->fifo_enabled = 0;
dev->xmit_fifo_pos = dev->rcvr_fifo_pos = 0;
dev->xmit_fifo_end = dev->rcvr_fifo_end = 0;
dev->rcvr_fifo_full = 0;
dev->baud_cycles = 0;
dev->new = 0;
dev->out_new = 0xffff;
memset(dev->xmit_fifo, 0, 16);
memset(dev->rcvr_fifo, 0, 14);
memset(dev->rcvr_fifo, 0, 16);
}
void
@@ -89,7 +92,10 @@ serial_transmit_period(serial_t *dev)
{
double ddlab;
ddlab = (double) dev->dlab;
if (dev->dlab != 0x0000)
ddlab = (double) dev->dlab;
else
ddlab = 65536.0;
/* Bit period based on DLAB. */
dev->transmit_period = (16000000.0 * ddlab) / dev->clock_src;
@@ -145,42 +151,88 @@ serial_clear_timeout(serial_t *dev)
}
static void
write_fifo(serial_t *dev, uint8_t dat)
serial_receive_timer(void *priv)
{
serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos & 0x0f);
serial_t *dev = (serial_t *) priv;
#if 0
uint16_t old_out_new = dev->out_new;
#endif
// serial_log("serial_receive_timer()\n");
timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period);
if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) {
/* FIFO mode. */
timer_disable(&dev->timeout_timer);
/* Indicate overrun. */
if (dev->rcvr_fifo_full)
dev->lsr |= 0x02;
else
dev->rcvr_fifo[dev->rcvr_fifo_pos] = dat;
dev->lsr &= 0xfe;
dev->int_status &= ~SERIAL_INT_RECEIVE;
if (dev->rcvr_fifo_pos == (dev->rcvr_fifo_len - 1)) {
dev->lsr |= 0x01;
dev->int_status |= SERIAL_INT_RECEIVE;
if (dev->out_new != 0xffff) {
/* We have received a byte into the RSR. */
/* Clear FIFO timeout. */
serial_clear_timeout(dev);
if (dev->rcvr_fifo_full) {
/* Overrun - just discard the byte in the RSR. */
serial_log("FIFO overrun\n");
dev->lsr |= 0x02;
} else {
/* We can input data into the FIFO. */
dev->rcvr_fifo[dev->rcvr_fifo_end] = (uint8_t) (dev->out_new & 0xff);
dev->rcvr_fifo_end = (dev->rcvr_fifo_end + 1) & 0x0f;
serial_log("To FIFO: %02X (%i)\n", (uint8_t) (dev->out_new & 0xff),
abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos));
dev->out_new = 0xffff;
if (abs(dev->rcvr_fifo_end - dev->rcvr_fifo_pos) >= dev->rcvr_fifo_len) {
/* We have >= trigger level bytes, raise Data Ready interrupt. */
serial_log("We have >= %i bytes in the FIFO, data ready!\n", dev->rcvr_fifo_len);
dev->lsr |= 0x01;
dev->int_status |= SERIAL_INT_RECEIVE;
serial_update_ints(dev);
}
timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
}
}
if (dev->rcvr_fifo_pos < (dev->rcvr_fifo_len - 1))
dev->rcvr_fifo_pos++;
else
dev->rcvr_fifo_full = 1;
serial_update_ints(dev);
timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
}
serial_update_ints(dev);
#if 0
serial_log("FIFO: %i, out_new = %04X, old_out_new = %04X, was_enabled = %i, condition = %i\n",
((dev->type >= SERIAL_16550) && dev->fifo_enabled), dev->out_new,
old_out_new, was_enabled,
((dev->type >= SERIAL_16550) && dev->fifo_enabled) ? (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) : dev->new);
#endif
}
static void
write_fifo(serial_t *dev, uint8_t dat)
{
serial_log("write_fifo(%08X, %02X, %i, %i)\n", dev, dat, (dev->type >= SERIAL_16550) && dev->fifo_enabled, dev->rcvr_fifo_pos % dev->rcvr_fifo_len);
if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) {
/* FIFO mode. */
/* This is the first phase, we are sending the data to the RSR (Receiver Shift
Register), from where it's going to get dispatched to the FIFO. */
} else {
/* Non-FIFO mode. */
/* Indicate overrun. */
if (dev->lsr & 0x01)
dev->lsr |= 0x02;
dev->dat = dat;
/* Raise Data Ready interrupt. */
serial_log("To RHR: %02X\n", dat);
dev->lsr |= 0x01;
dev->int_status |= SERIAL_INT_RECEIVE;
if (dev->lsr & 0x02)
dev->int_status |= SERIAL_INT_LSR;
serial_update_ints(dev);
}
/* Do this here, because in non-FIFO mode, this is read directly. */
dev->out_new = (uint16_t) dat;
}
void
@@ -334,6 +386,8 @@ serial_device_timeout(void *priv)
static void
serial_update_speed(serial_t *dev)
{
timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period);
if (dev->transmit_enabled & 3)
timer_on_auto(&dev->transmit_timer, dev->transmit_period);
@@ -482,6 +536,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
if (val & 0x02) {
memset(dev->rcvr_fifo, 0, 14);
dev->rcvr_fifo_pos = 0;
dev->rcvr_fifo_end = 0;
dev->rcvr_fifo_full = 0;
}
if (val & 0x04) {
@@ -502,6 +557,8 @@ serial_write(uint16_t addr, uint8_t val, void *p)
dev->rcvr_fifo_len = 14;
break;
}
dev->out_new = 0xffff;
dev->new = 0;
serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len);
}
break;
@@ -583,7 +640,7 @@ uint8_t
serial_read(uint16_t addr, void *p)
{
serial_t *dev = (serial_t *) p;
uint8_t i, ret = 0;
uint8_t ret = 0;
cycles -= ISA_CYCLES(8);
@@ -594,37 +651,46 @@ serial_read(uint16_t addr, void *p)
break;
}
/* Clear timeout. */
serial_clear_timeout(dev);
if ((dev->type >= SERIAL_16550) && dev->fifo_enabled) {
/* FIFO mode. */
serial_clear_timeout(dev);
if (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) {
/* There is data in the FIFO. */
ret = dev->rcvr_fifo[dev->rcvr_fifo_pos];
dev->rcvr_fifo_pos = (dev->rcvr_fifo_pos + 1) & 0x0f;
ret = dev->rcvr_fifo[0];
dev->rcvr_fifo_full = 0;
if (abs(dev->rcvr_fifo_pos - dev->rcvr_fifo_end) < dev->rcvr_fifo_len) {
/* Amount of data in the FIFO below trigger level,
clear Data Ready interrupt. */
dev->lsr &= 0xfe;
dev->int_status &= ~SERIAL_INT_RECEIVE;
serial_update_ints(dev);
for (i = 1; i < 16; i++)
dev->rcvr_fifo[i - 1] = dev->rcvr_fifo[i];
dev->rcvr_fifo_pos--;
if (dev->rcvr_fifo_pos > 0) {
serial_log("FIFO position %i: read %02X, next %02X\n", dev->rcvr_fifo_pos, ret, dev->rcvr_fifo[0]);
/* At least one byte remains to be read, start the timeout
timer so that a timeout is indicated in case of no read. */
timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
} else {
dev->lsr &= 0xfe;
dev->int_status &= ~SERIAL_INT_RECEIVE;
serial_update_ints(dev);
/* Make sure the Data Ready bit of the LSR is set if we still have
bytes left in the FIFO. */
if (dev->rcvr_fifo_pos != dev->rcvr_fifo_end) {
dev->lsr |= 0x01;
/* There are bytes left in the FIFO, activate the FIFO Timeout timer. */
timer_on_auto(&dev->timeout_timer, 4.0 * dev->bits * dev->transmit_period);
}
}
}
} else {
ret = dev->dat;
/* Non-FIFO mode. */
ret = (uint8_t) (dev->out_new & 0xffff);
dev->out_new = 0xffff;
/* Always clear Data Ready interrupt. */
dev->lsr &= 0xfe;
dev->int_status &= ~SERIAL_INT_RECEIVE;
serial_update_ints(dev);
}
serial_log("Read data: %02X\n", ret);
// serial_log("Read data: %02X\n", ret);
break;
case 1:
if (dev->lcr & 0x80)
@@ -760,6 +826,34 @@ serial_close(void *priv)
free(dev);
}
static void
serial_reset(void *priv)
{
serial_t *dev = (serial_t *) priv;
timer_disable(&dev->transmit_timer);
timer_disable(&dev->timeout_timer);
timer_disable(&dev->receive_timer);
dev->lsr = dev->thr = dev->mctrl = dev->rcr = 0x00;
dev->iir = dev->ier = dev->lcr = dev->msr = 0x00;
dev->dat = dev->int_status = dev->scratch = dev->fcr = 0x00;
dev->fifo_enabled = dev->rcvr_fifo_len = dev->bits = dev->data_bits = 0x00;
dev->baud_cycles = dev->rcvr_fifo_full = dev->txsr = dev->out = 0x00;
dev->dlab = dev->out_new = dev->new = 0x0000;
dev->rcvr_fifo_pos = dev->xmit_fifo_pos = dev->rcvr_fifo_end = dev->xmit_fifo_end = 0x00;
serial_reset_port(dev);
dev->dlab = 96;
dev->fcr = 0x06;
serial_transmit_period(dev);
serial_update_speed(dev);
}
static void *
serial_init(const device_t *info)
{
@@ -788,9 +882,11 @@ serial_init(const device_t *info)
dev->dlab = 96;
dev->fcr = 0x06;
dev->clock_src = 1843200.0;
serial_transmit_period(dev);
timer_add(&dev->transmit_timer, serial_transmit_timer, dev, 0);
timer_add(&dev->timeout_timer, serial_timeout_timer, dev, 0);
timer_add(&dev->receive_timer, serial_receive_timer, dev, 0);
serial_transmit_period(dev);
serial_update_speed(dev);
}
next_inst++;
@@ -818,7 +914,7 @@ const device_t ns8250_device = {
.local = SERIAL_8250,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,
@@ -832,7 +928,7 @@ const device_t ns8250_pcjr_device = {
.local = SERIAL_8250_PCJR,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,
@@ -846,7 +942,7 @@ const device_t ns16450_device = {
.local = SERIAL_16450,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,
@@ -860,7 +956,7 @@ const device_t ns16550_device = {
.local = SERIAL_16550,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,
@@ -874,7 +970,7 @@ const device_t ns16650_device = {
.local = SERIAL_16650,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,
@@ -888,7 +984,7 @@ const device_t ns16750_device = {
.local = SERIAL_16750,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,
@@ -902,7 +998,7 @@ const device_t ns16850_device = {
.local = SERIAL_16850,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,
@@ -916,7 +1012,7 @@ const device_t ns16950_device = {
.local = SERIAL_16950,
.init = serial_init,
.close = serial_close,
.reset = NULL,
.reset = serial_reset,
{ .available = NULL },
.speed_changed = serial_speed_changed,
.force_redraw = NULL,

9
src/include/86box/serial.h
View File

@@ -53,15 +53,16 @@ typedef struct serial_s {
dat, int_status, scratch, fcr,
irq, type, inst, transmit_enabled,
fifo_enabled, rcvr_fifo_len, bits, data_bits,
baud_cycles, rcvr_fifo_full, txsr, pad, msr_set;
baud_cycles, rcvr_fifo_full, txsr, out, msr_set, pad, pad0, pad1;
uint16_t dlab, base_address;
uint16_t dlab, base_address, out_new, new;
uint8_t rcvr_fifo_pos, xmit_fifo_pos,
pad0, pad1,
rcvr_fifo_end, xmit_fifo_end,
rcvr_fifo[SERIAL_FIFO_SIZE], xmit_fifo[SERIAL_FIFO_SIZE];
pc_timer_t transmit_timer, timeout_timer;
pc_timer_t transmit_timer, timeout_timer,
receive_timer;
double clock_src, transmit_period;
struct serial_device_s *sd;