DMA ports 81h and 82h workaround for proper CPU speed detection on the MegaPC BIOS and limited the MegaPC CPU speeds to >= 16 MHz and <= 25 MHz.
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46
src/dma.c
46
src/dma.c
@@ -949,16 +949,46 @@ dma_page_read(uint16_t addr, UNUSED(void *priv))
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uint8_t convert[8] = CHANNELS;
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uint8_t ret = 0xff;
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addr &= 0x0f;
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ret = dmaregs[2][addr];
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if (((addr & 0xfffc) == 0x80) && (CS == 0xf000) &&
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((cpu_state.pc & 0xfffffff8) == 0x00007278) &&
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!strcmp(machine_get_internal_name(), "megapc")) switch (addr) {
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/* The Amstrad MegaPC Quadtel BIOS times a sequence of:
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mov ax,di
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div bx
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And expects this value to be at least 0x06e0 for 20 MHz,
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and at least 0x0898 for 25 MHz, everything below 0x06e0
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is assumed to be 16 MHz. Given that for some reason, this
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does not occur on 86Box, we have to work around it here,
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we return 0x0528 for 16 MHz, because it's the next in the
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mathematical sequence (it equals 0x06e0 - (0x0898 - 0x06e0)). */
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case 0x0081:
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if (cpu_busspeed >= 25000000)
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ret = 0x98;
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else if (cpu_busspeed >= 20000000)
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ret = 0xe0;
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else
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ret = 0x28;
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break;
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case 0x0082:
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if (cpu_busspeed >= 25000000)
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ret = 0x08;
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else if (cpu_busspeed >= 20000000)
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ret = 0x06;
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else
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ret = 0x05;
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break;
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} else {
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addr &= 0x0f;
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ret = dmaregs[2][addr];
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if (addr >= 8)
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addr = convert[addr & 0x07] | 4;
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else
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addr = convert[addr & 0x07];
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if (addr >= 8)
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addr = convert[addr & 0x07] | 4;
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else
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addr = convert[addr & 0x07];
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if (addr < 8)
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ret = dma[addr].page_l;
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if (addr < 8)
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ret = dma[addr].page_l;
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}
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return ret;
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}
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@@ -4628,8 +4628,8 @@ const machine_t machines[] = {
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.cpu = {
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.package = CPU_PKG_386SX,
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.block = CPU_BLOCK_NONE,
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.min_bus = 0,
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.max_bus = 0,
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.min_bus = 16000000,
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.max_bus = 25000000,
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.min_voltage = 0,
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.max_voltage = 0,
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.min_multi = 0,
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