Made softfloat work on the dynamic recompiler (not yet enabled in the Settings dialog, needs MMX and FXSAVE/FXRSTOR for softfloat first).
This commit is contained in:
@@ -607,3 +607,51 @@ RecompOpFn recomp_opcodes_REPNE[512] = {
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/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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// clang-format on
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};
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RecompOpFn recomp_opcodes_NULL[512] = {
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// clang-format off
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/*16-bit data*/
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/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
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/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*80*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*32-bit data*/
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/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
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/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*80*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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// clang-format on
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};
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@@ -17,6 +17,7 @@ extern RecompOpFn recomp_opcodes_de[512];
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extern RecompOpFn recomp_opcodes_df[512];
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extern RecompOpFn recomp_opcodes_REPE[512];
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extern RecompOpFn recomp_opcodes_REPNE[512];
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extern RecompOpFn recomp_opcodes_NULL[512];
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#define REG_EAX 0
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#define REG_ECX 1
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@@ -883,7 +883,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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case 0xd8:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
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recomp_op_table = recomp_opcodes_d8;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_d8;
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opcode_shift = 3;
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opcode_mask = 0x1f;
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over = 1;
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@@ -893,7 +893,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xd9:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
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recomp_op_table = recomp_opcodes_d9;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_d9;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -902,7 +902,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xda:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
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recomp_op_table = recomp_opcodes_da;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_da;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -911,7 +911,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdb:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
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recomp_op_table = recomp_opcodes_db;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_db;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -920,7 +920,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdc:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
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recomp_op_table = recomp_opcodes_dc;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_dc;
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opcode_shift = 3;
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opcode_mask = 0x1f;
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over = 1;
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@@ -930,7 +930,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdd:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
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recomp_op_table = recomp_opcodes_dd;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_dd;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -939,7 +939,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xde:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
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recomp_op_table = recomp_opcodes_de;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_de;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -948,7 +948,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdf:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
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recomp_op_table = recomp_opcodes_df;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_df;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -1921,7 +1921,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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case 0xd8:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
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recomp_op_table = recomp_opcodes_d8;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_d8;
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opcode_shift = 3;
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opcode_mask = 0x1f;
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over = 1;
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@@ -1931,7 +1931,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xd9:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
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recomp_op_table = recomp_opcodes_d9;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_d9;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -1940,7 +1940,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xda:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
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recomp_op_table = recomp_opcodes_da;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_da;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -1949,7 +1949,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdb:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
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recomp_op_table = recomp_opcodes_db;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_db;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -1958,7 +1958,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdc:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
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recomp_op_table = recomp_opcodes_dc;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_dc;
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opcode_shift = 3;
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opcode_mask = 0x1f;
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over = 1;
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@@ -1968,7 +1968,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdd:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
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recomp_op_table = recomp_opcodes_dd;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_dd;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -1977,7 +1977,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xde:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
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recomp_op_table = recomp_opcodes_de;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_de;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -1986,7 +1986,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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break;
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case 0xdf:
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
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recomp_op_table = recomp_opcodes_df;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_df;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -439,8 +439,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xd8;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_d8_a32 : (OpFn *) x86_dynarec_opcodes_d8_a16;
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recomp_op_table = recomp_opcodes_d8;
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_d8;
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opcode_shift = 3;
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opcode_mask = 0x1f;
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over = 1;
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@@ -452,8 +452,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xd9;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_d9_a32 : (OpFn *) x86_dynarec_opcodes_d9_a16;
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recomp_op_table = recomp_opcodes_d9;
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_d9;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -464,8 +464,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xda;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_da_a32 : (OpFn *) x86_dynarec_opcodes_da_a16;
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recomp_op_table = recomp_opcodes_da;
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_da;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -476,8 +476,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xdb;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_db_a32 : (OpFn *) x86_dynarec_opcodes_db_a16;
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recomp_op_table = recomp_opcodes_db;
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_db;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -488,8 +488,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xdc;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_dc_a32 : (OpFn *) x86_dynarec_opcodes_dc_a16;
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recomp_op_table = recomp_opcodes_dc;
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_dc;
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opcode_shift = 3;
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opcode_mask = 0x1f;
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over = 1;
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@@ -501,8 +501,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xdd;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_dd_a32 : (OpFn *) x86_dynarec_opcodes_dd_a16;
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recomp_op_table = recomp_opcodes_dd;
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_dd;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -513,8 +513,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xde;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_de_a32 : (OpFn *) x86_dynarec_opcodes_de_a16;
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recomp_op_table = recomp_opcodes_de;
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op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
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recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_de;
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opcode_mask = 0xff;
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over = 1;
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pc_off = -1;
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@@ -525,8 +525,8 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
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#ifdef DEBUG_EXTRA
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last_prefix = 0xdf;
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#endif
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op_table = (op_32 & 0x200) ? (OpFn *) x86_dynarec_opcodes_df_a32 : (OpFn *) x86_dynarec_opcodes_df_a16;
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||||
recomp_op_table = recomp_opcodes_df;
|
||||
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
|
||||
recomp_op_table = fpu_softfloat ? recomp_opcodes_NULL : recomp_opcodes_df;
|
||||
opcode_mask = 0xff;
|
||||
over = 1;
|
||||
pc_off = -1;
|
||||
|
@@ -556,3 +556,52 @@ RecompOpFn recomp_opcodes_df[512] = {
|
||||
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
RecompOpFn recomp_opcodes_NULL[512] = {
|
||||
// clang-format off
|
||||
/*16-bit data*/
|
||||
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
|
||||
/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
||||
/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
||||
/*80*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
||||
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
||||
/*32-bit data*/
|
||||
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
|
||||
/*00*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*10*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*20*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*30*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
||||
/*40*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*50*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*60*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*70*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
||||
/*80*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*90*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*a0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*b0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
|
||||
/*c0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*d0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*e0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
/*f0*/ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
|
@@ -20,6 +20,7 @@ extern RecompOpFn recomp_opcodes_de[512];
|
||||
extern RecompOpFn recomp_opcodes_df[512];
|
||||
/*extern RecompOpFn recomp_opcodes_REPE[512];
|
||||
extern RecompOpFn recomp_opcodes_REPNE[512];*/
|
||||
extern RecompOpFn recomp_opcodes_NULL[512];
|
||||
|
||||
#define REG_EAX 0
|
||||
#define REG_ECX 1
|
||||
|
188
src/cpu/cpu.c
188
src/cpu/cpu.c
@@ -202,7 +202,7 @@ void
|
||||
cpu_set_edx(void)
|
||||
{
|
||||
EDX = cpu_s->edx_reset;
|
||||
if (!cpu_use_dynarec && fpu_softfloat)
|
||||
if (fpu_softfloat)
|
||||
SF_FPU_reset();
|
||||
}
|
||||
|
||||
@@ -457,22 +457,41 @@ cpu_set(void)
|
||||
|
||||
if (hasfpu) {
|
||||
#ifdef USE_DYNAREC
|
||||
x86_dynarec_opcodes_d8_a16 = dynarec_ops_fpu_d8_a16;
|
||||
x86_dynarec_opcodes_d8_a32 = dynarec_ops_fpu_d8_a32;
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_df_a32;
|
||||
if (fpu_softfloat) {
|
||||
x86_dynarec_opcodes_d8_a16 = dynarec_ops_sf_fpu_d8_a16;
|
||||
x86_dynarec_opcodes_d8_a32 = dynarec_ops_sf_fpu_d8_a32;
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_sf_fpu_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_sf_fpu_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_sf_fpu_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_sf_fpu_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_sf_fpu_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_sf_fpu_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_sf_fpu_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_sf_fpu_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_sf_fpu_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_sf_fpu_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_sf_fpu_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_sf_fpu_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_sf_fpu_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_sf_fpu_df_a32;
|
||||
} else {
|
||||
x86_dynarec_opcodes_d8_a16 = dynarec_ops_fpu_d8_a16;
|
||||
x86_dynarec_opcodes_d8_a32 = dynarec_ops_fpu_d8_a32;
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_df_a32;
|
||||
}
|
||||
#endif
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_d8_a16 = ops_sf_fpu_d8_a16;
|
||||
@@ -581,20 +600,37 @@ cpu_set(void)
|
||||
|
||||
if (fpu_type == FPU_287) {
|
||||
#ifdef USE_DYNAREC
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32;
|
||||
if (fpu_softfloat) {
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_sf_fpu_287_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_sf_fpu_287_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_sf_fpu_287_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_sf_fpu_287_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_sf_fpu_287_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_sf_fpu_287_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_sf_fpu_287_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_sf_fpu_287_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_sf_fpu_287_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_sf_fpu_287_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_sf_fpu_287_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_sf_fpu_287_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_sf_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_sf_fpu_287_df_a32;
|
||||
} else {
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32;
|
||||
}
|
||||
#endif
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_d9_a16 = ops_sf_fpu_287_d9_a16;
|
||||
@@ -674,20 +710,37 @@ cpu_set(void)
|
||||
case CPU_386DX:
|
||||
if (fpu_type == FPU_287) { /* In case we get Deskpro 386 emulation */
|
||||
#ifdef USE_DYNAREC
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32;
|
||||
if (fpu_softfloat) {
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_sf_fpu_287_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_sf_fpu_287_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_sf_fpu_287_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_sf_fpu_287_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_sf_fpu_287_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_sf_fpu_287_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_sf_fpu_287_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_sf_fpu_287_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_sf_fpu_287_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_sf_fpu_287_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_sf_fpu_287_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_sf_fpu_287_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_sf_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_sf_fpu_287_df_a32;
|
||||
} else {
|
||||
x86_dynarec_opcodes_d9_a16 = dynarec_ops_fpu_287_d9_a16;
|
||||
x86_dynarec_opcodes_d9_a32 = dynarec_ops_fpu_287_d9_a32;
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_287_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_287_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_287_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_287_db_a32;
|
||||
x86_dynarec_opcodes_dc_a16 = dynarec_ops_fpu_287_dc_a16;
|
||||
x86_dynarec_opcodes_dc_a32 = dynarec_ops_fpu_287_dc_a32;
|
||||
x86_dynarec_opcodes_dd_a16 = dynarec_ops_fpu_287_dd_a16;
|
||||
x86_dynarec_opcodes_dd_a32 = dynarec_ops_fpu_287_dd_a32;
|
||||
x86_dynarec_opcodes_de_a16 = dynarec_ops_fpu_287_de_a16;
|
||||
x86_dynarec_opcodes_de_a32 = dynarec_ops_fpu_287_de_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_287_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_287_df_a32;
|
||||
}
|
||||
#endif
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_d9_a16 = ops_sf_fpu_287_d9_a16;
|
||||
@@ -1114,12 +1167,21 @@ cpu_set(void)
|
||||
case CPU_Cx6x86MX:
|
||||
if (cpu_s->cpu_type == CPU_Cx6x86MX) {
|
||||
# ifdef USE_DYNAREC
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32;
|
||||
if (fpu_softfloat) {
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_sf_fpu_686_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_sf_fpu_686_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_sf_fpu_686_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_sf_fpu_686_db_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_sf_fpu_686_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_sf_fpu_686_df_a32;
|
||||
} else {
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32;
|
||||
}
|
||||
# endif
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_da_a16 = ops_sf_fpu_686_da_a16;
|
||||
@@ -1152,7 +1214,8 @@ cpu_set(void)
|
||||
else if (cpu_s->cpu_type == CPU_Cx6x86L)
|
||||
x86_setopcodes(ops_386, ops_pentium_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_c6x86_0f);
|
||||
x86_setopcodes(ops_386, ops_c6x86mx_0f);
|
||||
// x86_setopcodes(ops_386, ops_c6x86_0f);
|
||||
# endif
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
@@ -1326,12 +1389,21 @@ cpu_set(void)
|
||||
x86_setopcodes(ops_386, ops_pentium2_0f, dynarec_ops_386, dynarec_ops_pentium2_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_pentiumpro_0f, dynarec_ops_386, dynarec_ops_pentiumpro_0f);
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32;
|
||||
if (fpu_softfloat) {
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_sf_fpu_686_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_sf_fpu_686_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_sf_fpu_686_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_sf_fpu_686_db_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_sf_fpu_686_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_sf_fpu_686_df_a32;
|
||||
} else {
|
||||
x86_dynarec_opcodes_da_a16 = dynarec_ops_fpu_686_da_a16;
|
||||
x86_dynarec_opcodes_da_a32 = dynarec_ops_fpu_686_da_a32;
|
||||
x86_dynarec_opcodes_db_a16 = dynarec_ops_fpu_686_db_a16;
|
||||
x86_dynarec_opcodes_db_a32 = dynarec_ops_fpu_686_db_a32;
|
||||
x86_dynarec_opcodes_df_a16 = dynarec_ops_fpu_686_df_a16;
|
||||
x86_dynarec_opcodes_df_a32 = dynarec_ops_fpu_686_df_a32;
|
||||
}
|
||||
#else
|
||||
if (cpu_s->cpu_type == CPU_PENTIUM2D)
|
||||
x86_setopcodes(ops_386, ops_pentium2d_0f);
|
||||
|
@@ -102,6 +102,38 @@ extern const OpFn dynarec_ops_pentiumpro_0f[1024];
|
||||
extern const OpFn dynarec_ops_pentium2_0f[1024];
|
||||
extern const OpFn dynarec_ops_pentium2d_0f[1024];
|
||||
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_d9_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_d9_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_da_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_da_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_db_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_db_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_dc_a16[32];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_dc_a32[32];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_dd_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_dd_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_de_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_de_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_df_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_287_df_a32[256];
|
||||
|
||||
extern const OpFn dynarec_ops_sf_fpu_d8_a16[32];
|
||||
extern const OpFn dynarec_ops_sf_fpu_d8_a32[32];
|
||||
extern const OpFn dynarec_ops_sf_fpu_d9_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_d9_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_da_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_da_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_db_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_db_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_dc_a16[32];
|
||||
extern const OpFn dynarec_ops_sf_fpu_dc_a32[32];
|
||||
extern const OpFn dynarec_ops_sf_fpu_dd_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_dd_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_de_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_de_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_df_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_df_a32[256];
|
||||
|
||||
extern const OpFn dynarec_ops_fpu_287_d9_a16[256];
|
||||
extern const OpFn dynarec_ops_fpu_287_d9_a32[256];
|
||||
extern const OpFn dynarec_ops_fpu_287_da_a16[256];
|
||||
@@ -136,6 +168,13 @@ extern const OpFn dynarec_ops_fpu_df_a32[256];
|
||||
extern const OpFn dynarec_ops_nofpu_a16[256];
|
||||
extern const OpFn dynarec_ops_nofpu_a32[256];
|
||||
|
||||
extern const OpFn dynarec_ops_sf_fpu_686_da_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_686_da_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_686_db_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_686_db_a32[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_686_df_a16[256];
|
||||
extern const OpFn dynarec_ops_sf_fpu_686_df_a32[256];
|
||||
|
||||
extern const OpFn dynarec_ops_fpu_686_da_a16[256];
|
||||
extern const OpFn dynarec_ops_fpu_686_da_a32[256];
|
||||
extern const OpFn dynarec_ops_fpu_686_db_a16[256];
|
||||
|
@@ -97,7 +97,8 @@ opWAIT(uint32_t fetchdat)
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (!cpu_use_dynarec && fpu_softfloat) {
|
||||
// if (!cpu_use_dynarec && fpu_softfloat) {
|
||||
if (fpu_softfloat) {
|
||||
if (fpu_state.swd & FPU_SW_Summary) {
|
||||
if (cr0 & 0x20) {
|
||||
x86_int(16);
|
||||
|
Reference in New Issue
Block a user