Changed the GPL license of the azt2316a.c source file.
Added F82C710 SIO to the super286tr.
This commit is contained in:
@@ -34,6 +34,7 @@
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#include "fdd.h"
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#include "fdc.h"
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#include "hdc.h"
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#include "sio.h"
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#include "video.h"
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#include "machine.h"
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@@ -293,6 +294,8 @@ machine_at_gw286ct_init(const machine_t *model)
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if (bios_only || !ret)
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return ret;
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device_add(&f82c710_device);
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machine_at_scat_init(model, 1);
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return ret;
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@@ -8,7 +8,7 @@
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*
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* Definitions for the Super I/O chips.
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*
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*
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* Version: @(#)sio.h 1.0.7 2020/01/25
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*
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* Author: Fred N. van Kempen, <decwiz@yahoo.com>
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* Copyright 2017-2020 Fred N. van Kempen.
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@@ -18,6 +18,7 @@
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extern const device_t acc3221_device;
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extern const device_t f82c710_device;
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extern const device_t fdc37c663_device;
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extern const device_t fdc37c665_device;
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extern const device_t fdc37c666_device;
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239
src/sio_f82c710.c
Normal file
239
src/sio_f82c710.c
Normal file
@@ -0,0 +1,239 @@
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the Chips & Technologies F82C710 Universal Peripheral Controller (UPC).
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*
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* Version: @(#)sio_f82c710.c 1.0.0 2020/03/12
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*
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* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
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* Eluan Costa Miranda <eluancm@gmail.com>
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*
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* Copyright 2020 Sarah Walker.
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* Copyright 2020 Eluan Costa Miranda.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include "86box.h"
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#include "86box_io.h"
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#include "timer.h"
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#include "device.h"
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#include "lpt.h"
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#include "serial.h"
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#include "disk/hdc.h"
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#include "disk/hdc_ide.h"
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#include "floppy/fdd.h"
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#include "floppy/fdc.h"
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#include "sio.h"
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typedef struct upc_t
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{
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int configuration_state; /* state of algorithm to enter configuration mode */
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int configuration_mode;
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uint16_t cri_addr; /* cri = configuration index register, addr is even */
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uint16_t cap_addr; /* cap = configuration access port, addr is odd and is cri_addr + 1 */
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uint8_t cri; /* currently indexed register */
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/* these regs are not affected by reset */
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uint8_t regs[15]; /* there are 16 indexes, but there is no need to store the last one which is: R = cri_addr / 4, W = exit config mode */
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fdc_t *fdc;
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serial_t *uart[2];
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} upc_t;
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static void
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f82c710_update_ports(upc_t *upc)
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{
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uint16_t com_addr = 0;
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uint16_t lpt_addr = 0;
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serial_remove(upc->uart[0]);
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serial_remove(upc->uart[1]);
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lpt1_remove();
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lpt2_remove();
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fdc_remove(upc->fdc);
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ide_pri_disable();
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if (upc->regs[0] & 4) {
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com_addr = upc->regs[4] * 4;
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if (com_addr == SERIAL1_ADDR) {
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serial_setup(upc->uart[0], com_addr, 4);
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} else if (com_addr == SERIAL2_ADDR) {
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serial_setup(upc->uart[1], com_addr, 3);
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}
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}
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if (upc->regs[0] & 8) {
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lpt_addr = upc->regs[6] * 4;
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lpt1_init(lpt_addr);
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if ((lpt_addr == 0x378) || (lpt_addr == 0x3bc)) {
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lpt1_irq(7);
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} else if (lpt_addr == 0x278) {
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lpt1_irq(5);
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}
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}
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if (upc->regs[12] & 0x80) {
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ide_pri_enable();
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}
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if (upc->regs[12] & 0x20) {
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fdc_set_base(upc->fdc, 0x03f0);
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}
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}
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static uint8_t
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f82c710_config_read(uint16_t port, void *priv)
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{
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upc_t *upc = (upc_t *)priv;
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uint8_t temp = 0xff;
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if (upc->configuration_mode) {
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if (port == upc->cri_addr) {
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temp = upc->cri;
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} else if (port == upc->cap_addr) {
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if (upc->cri == 0xf)
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temp = upc->cri_addr / 4;
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else
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temp = upc->regs[upc->cri];
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}
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}
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return temp;
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}
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static void
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f82c710_config_write(uint16_t port, uint8_t val, void *priv)
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{
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upc_t *upc = (upc_t *)priv;
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int configuration_state_event = 0;
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switch(port) {
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case 0x2fa:
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if (upc->configuration_state == 0 && val == 0x55)
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configuration_state_event = 1;
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else if (upc->configuration_state == 4) {
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uint8_t addr_verify = upc->cri_addr / 4;
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addr_verify += val;
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if (addr_verify == 0xff) {
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upc->configuration_mode = 1;
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/* TODO: is the value of cri reset here or when exiting configuration mode? */
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io_sethandler(upc->cri_addr, 0x0002, f82c710_config_read, NULL, NULL, f82c710_config_write, NULL, NULL, upc);
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} else {
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upc->configuration_mode = 0;
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}
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}
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break;
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case 0x3fa:
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if (upc->configuration_state == 1 && val == 0xaa)
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configuration_state_event = 1;
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else if (upc->configuration_state == 2 && val == 0x36)
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configuration_state_event = 1;
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else if (upc->configuration_state == 3) {
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upc->cri_addr = val * 4;
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upc->cap_addr = upc->cri_addr + 1;
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configuration_state_event = 1;
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}
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break;
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default:
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break;
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}
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if (upc->configuration_mode) {
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if (port == upc->cri_addr) {
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upc->cri = val & 0xf;
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} else if (port == upc->cap_addr) {
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if (upc->cri == 0xf) {
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upc->configuration_mode = 0;
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io_removehandler(upc->cri_addr, 0x0002, f82c710_config_read, NULL, NULL, f82c710_config_write, NULL, NULL, upc);
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f82c710_update_ports(upc); /* TODO: any benefit in updating at each register write instead of when exiting config mode? */
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} else {
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upc->regs[upc->cri] = val;
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}
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}
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}
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/* TODO: is the state only reset when accessing 0x2fa and 0x3fa wrongly? */
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if ((port == 0x2fa || port == 0x3fa) && configuration_state_event)
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upc->configuration_state++;
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else
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upc->configuration_state = 0;
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}
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static void
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f82c710_reset(upc_t *upc)
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{
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serial_remove(upc->uart[0]);
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serial_setup(upc->uart[0], SERIAL1_ADDR, SERIAL1_IRQ);
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serial_remove(upc->uart[1]);
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serial_setup(upc->uart[1], SERIAL2_ADDR, SERIAL2_IRQ);
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lpt1_remove();
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lpt1_init(0x378);
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lpt1_irq(7);
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fdc_reset(upc->fdc);
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}
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static void *
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f82c710_init(const device_t *info)
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{
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upc_t *upc = (upc_t *) malloc(sizeof(upc_t));
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memset(upc, 0, sizeof(upc_t));
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upc->fdc = device_add(&fdc_at_device);
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upc->uart[0] = device_add_inst(&ns16450_device, 1);
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upc->uart[1] = device_add_inst(&ns16450_device, 2);
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io_sethandler(0x02fa, 0x0001, NULL, NULL, NULL, f82c710_config_write, NULL, NULL, upc);
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io_sethandler(0x03fa, 0x0001, NULL, NULL, NULL, f82c710_config_write, NULL, NULL, upc);
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upc->regs[0] = 0x0c;
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upc->regs[1] = 0x00;
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upc->regs[2] = 0x00;
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upc->regs[3] = 0x00;
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upc->regs[4] = 0xfe;
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upc->regs[5] = 0x00;
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upc->regs[6] = 0x9e;
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upc->regs[7] = 0x00;
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upc->regs[8] = 0x00;
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upc->regs[9] = 0xb0;
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upc->regs[10] = 0x00;
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upc->regs[11] = 0x00;
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upc->regs[12] = 0xa0;
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upc->regs[13] = 0x00;
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upc->regs[14] = 0x00;
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f82c710_reset(upc);
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f82c710_update_ports(upc);
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return upc;
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}
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static void
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f82c710_close(void *priv)
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{
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upc_t *upc = (upc_t *)priv;
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free(upc);
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}
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const device_t f82c710_device = {
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"F82C710 UPC Super I/O",
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0,
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0,
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f82c710_init, f82c710_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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@@ -18,7 +18,7 @@
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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