ATAPI DMA now tells the bus master the correct length to transfer;
ATAPI DMA now transfers all blocks at once.
This commit is contained in:
23
src/cdrom.c
23
src/cdrom.c
@@ -973,6 +973,10 @@ static void cdrom_data_command_finish(uint8_t id, int len, int block_len, int al
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{
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SCSIDevices[cdrom_drives[id].scsi_device_id][cdrom_drives[id].scsi_device_lun].InitLength = 0;
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}
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else
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{
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cdrom[id].init_length = 0;
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}
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cdrom_command_complete(id);
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}
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else
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@@ -985,6 +989,10 @@ static void cdrom_data_command_finish(uint8_t id, int len, int block_len, int al
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{
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SCSIDevices[cdrom_drives[id].scsi_device_id][cdrom_drives[id].scsi_device_lun].InitLength = alloc_len;
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}
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else
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{
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cdrom[id].init_length = alloc_len;
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}
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cdrom_command_read_dma(id);
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}
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else
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@@ -1963,7 +1971,8 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
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}
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max_len = cdrom[id].sector_len;
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if (cdrom_drives[id].bus_type)
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// if (cdrom_drives[id].bus_type)
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if (cdrom_current_mode(id) == 2)
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{
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cdrom[id].requested_blocks = max_len;
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}
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@@ -2732,6 +2741,14 @@ int cdrom_block_check(uint8_t id)
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int alloc_length = 0;
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int ret = 0;
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if (!cdrom_drives[id].bus_type)
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{
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cdrom_log("CD-ROM %i: Lowering IDE IRQ\n", id);
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ide_irq_lower(&(ide_drives[cdrom_drives[id].ide_channel]));
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}
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cdrom[id].status = BUSY_STAT;
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/* If this is a media access command, and we hit the end of the block but not the entire length,
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read the next block. */
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if (cdrom_is_media_access(id))
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@@ -2787,6 +2804,7 @@ void cdrom_callback(uint8_t id) /* Callback for non-Read CD commands */
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int ret = 0;
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int old_pos = 0;
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#if 0
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if (!cdrom_drives[id].bus_type)
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{
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cdrom_log("CD-ROM %i: Lowering IDE IRQ\n", id);
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@@ -2794,6 +2812,7 @@ void cdrom_callback(uint8_t id) /* Callback for non-Read CD commands */
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}
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cdrom[id].status = BUSY_STAT;
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#endif
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if (cdrom[id].total_read >= cdrom[id].packet_len)
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{
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@@ -2963,7 +2982,7 @@ int cdrom_write_to_ide_dma(uint8_t channel)
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if (ide_bus_master_read)
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{
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if (ide_bus_master_read(channel >> 1, cdbufferb, cdrom[id].request_length))
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if (ide_bus_master_read(channel >> 1, cdbufferb, cdrom[id].init_length))
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{
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cdrom_data_phase_error(id);
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cdrom_phase_callback(id);
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@@ -112,6 +112,8 @@ typedef struct __attribute__((__packed__))
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int old_len;
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int block_descriptor_len;
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int init_length;
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} cdrom_t;
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extern cdrom_t cdrom[CDROM_NUM];
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10
src/ide.c
10
src/ide.c
@@ -206,10 +206,11 @@ void ide_irq_raise(IDE *ide)
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{
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if ((ide->board > 3) || ide->irqstat)
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{
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// ide_log("Not raising IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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return;
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}
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// ide_log("Raising IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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ide_log("Raising IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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if (!(ide->fdisk&2))
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{
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@@ -234,10 +235,11 @@ void ide_irq_lower(IDE *ide)
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{
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if ((ide->board > 3) || !(ide->irqstat))
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{
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// ide_log("Not lowering IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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return;
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}
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// ide_log("Lowering IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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ide_log("Lowering IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
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picintc(1 << ide_irq[ide->board]);
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ide->irqstat=0;
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@@ -1393,7 +1395,7 @@ uint8_t readide(int ide_board, uint16_t addr)
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case 0x1F0: /* Data */
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// temp = ide_read_data(ide_board, 1);
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tempw = readidew(ide_board);
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// pclog("Read IDEW %04X\n", tempw);
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// ide_log("Read IDEW %04X\n", tempw);
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temp = tempw & 0xff;
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break;
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@@ -1549,7 +1551,7 @@ uint16_t readidew(int ide_board)
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uint32_t readidel(int ide_board)
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{
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uint16_t temp;
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// pclog("Read IDEl %i\n", ide_board);
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// ide_log("Read IDEl %i\n", ide_board);
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temp = readidew(ide_board);
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return temp | (readidew(ide_board) << 16);
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}
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@@ -409,7 +409,7 @@ int piix_bus_master_dma_read(int channel, uint8_t *data, int transfer_length)
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while (transferred < transfer_length)
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{
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if (piix_busmaster[channel].count < (transfer_length - transferred) && piix_busmaster[channel].eot)
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fatal("DMA on channel %i - Read count less than transfer_length! Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
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fatal("DMA on channel %i - Read count less than %04X! Addr %08X Count %04X EOT %i\n", channel, transfer_length, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
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mem_invalidate_range(piix_busmaster[channel].addr, piix_busmaster[channel].addr + transfer_length - 1);
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@@ -451,14 +451,18 @@ int piix_bus_master_dma_read(int channel, uint8_t *data, int transfer_length)
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int piix_bus_master_dma_write(int channel, uint8_t *data, int transfer_length)
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{
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int transferred = 0;
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// pclog("piix_bus_master_dma_write(%08X, %08X, %08X) on %08X data\n", channel, data, transfer_length, piix_busmaster[channel].count);
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if (!(piix_busmaster[channel].status & 1))
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return 1; /*DMA disabled*/
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pclog("DMA not disabled\n");
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while (transferred < transfer_length)
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{
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if (piix_busmaster[channel].count < (transfer_length - transferred) && piix_busmaster[channel].eot)
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fatal("DMA on channel %i - Write count less than transfer_length! Addr %08X Count %04X EOT %i\n", channel, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
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fatal("DMA on channel %i - Write count less than %04X! Addr %08X Count %04X EOT %i\n", channel, transfer_length, piix_busmaster[channel].addr, piix_busmaster[channel].count, piix_busmaster[channel].eot);
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if (piix_busmaster[channel].count < (transfer_length - transferred))
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{
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