80486DX2-66/86Box-fork
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Switched to the NEC V20/V30 development and corrected clock frequency list of the 8086/8088.

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This commit is contained in:
TC1995
2018-07-19 20:47:30 +02:00
parent 0c01e1d7a8
commit af066aee04
5 changed files with 218 additions and 71 deletions
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209
src/cpu/808x.c
View File

@@ -882,7 +882,7 @@ void rep(int fv)
goto startrep;
break;
case 0x6C: /*186+ REP INSB*/
if (is186)
if (is_nec)
{
if (c>0)
{
@@ -898,7 +898,7 @@ void rep(int fv)
}
break;
case 0x6D: /*186+ REP INSW*/
if (is186)
if (is_nec)
{
if (c>0)
{
@@ -914,7 +914,7 @@ void rep(int fv)
}
break;
case 0x6E: /*186+ REP OUTSB*/
if (is186)
if (is_nec)
{
if (c>0)
{
@@ -930,7 +930,7 @@ void rep(int fv)
}
break;
case 0x6F: /*186+ REP OUTSW*/
if (is186)
if (is_nec)
{
if (c>0)
{
@@ -1261,13 +1261,16 @@ void execx86(int cycs)
cpu_state.last_ea = SP;
cycles-=14;
break;
case 0x0F: /*POP CS - 8088/8086 only*/
if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP);
loadseg(tempw,&_cs);
SP+=2;
cpu_state.last_ea = SP;
cycles-=12;
case 0x0F: /*0F handler for NEC V20 soon */
if (!is_nec) /*POP CS - 8088/8086 only*/
{
if (cpu_state.ssegs) ss=oldss;
tempw=readmemw(ss,SP);
loadseg(tempw,&_cs);
SP+=2;
cpu_state.last_ea = SP;
cycles-=12;
}
break;
case 0x10: /*ADC 8,reg*/
@@ -1692,73 +1695,218 @@ void execx86(int cycs)
break;
case 0x60: /*JO alias*/
case 0x60:
if (is_nec) /*186+ PUSHA*/
{
writememw(ss, ((SP - 2) & 0xFFFF), AX);
writememw(ss, ((SP - 4) & 0xFFFF), CX);
writememw(ss, ((SP - 6) & 0xFFFF), DX);
writememw(ss, ((SP - 8) & 0xFFFF), BX);
writememw(ss, ((SP - 10) & 0xFFFF), SP);
writememw(ss, ((SP - 12) & 0xFFFF), BP);
writememw(ss, ((SP - 14) & 0xFFFF), SI);
writememw(ss, ((SP - 16) & 0xFFFF), DI);
cycles-=18;
break;
}
else /*JO alias*/
{
offset=(int8_t)FETCH();
if (flags&V_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
}
break;
case 0x70: /*JO*/
offset=(int8_t)FETCH();
if (flags&V_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x61: /*JNO alias*/
case 0x61:
if (is_nec) /*186+ POPA*/
{
DI = readmemw(ss, ((SP) & 0xFFFF));
SI = readmemw(ss, ((SP + 2) & 0xFFFF));
BP = readmemw(ss, ((SP + 4) & 0xFFFF));
BX = readmemw(ss, ((SP + 8) & 0xFFFF));
DX = readmemw(ss, ((SP + 10) & 0xFFFF));
CX = readmemw(ss, ((SP + 12) & 0xFFFF));
AX = readmemw(ss, ((SP + 14) & 0xFFFF));
SP += 16;
cycles-=24;
break;
}
else /*JNO alias*/
{
offset=(int8_t)FETCH();
if (!(flags&V_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
}
break;
case 0x71: /*JNO*/
offset=(int8_t)FETCH();
if (!(flags&V_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x62: /*JB alias*/
case 0x62:
if (is_nec) /*186+ BOUND*/
{
int16_t low, high;
low = geteaw();
high = readmemw(easeg,cpu_state.eaaddr);
if (((int16_t)cpu_state.regs[cpu_reg].w < low) || ((int16_t)cpu_state.regs[cpu_reg].w > high))
{
writememw(ss,(SP-2)&0xFFFF,flags|0xF000);
writememw(ss,(SP-4)&0xFFFF,CS);
writememw(ss,(SP-6)&0xFFFF,cpu_state.pc);
SP-=6;
flags&=~I_FLAG;
flags&=~T_FLAG;
cpu_state.pc=readmemw(0,0x14);
loadcs(readmemw(0,0x14+2));
FETCHCLEAR();
return;
}
cycles-=10;
break;
}
else /*JB alias*/
{
offset=(int8_t)FETCH();
if (flags&C_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
}
break;
case 0x72: /*JB*/
offset=(int8_t)FETCH();
if (flags&C_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x63: /*JNB alias*/
case 0x63: /*JNB alias*/
case 0x73: /*JNB*/
offset=(int8_t)FETCH();
if (!(flags&C_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x64: /*JE alias*/
case 0x64: /*JE alias*/
case 0x74: /*JE*/
offset=(int8_t)FETCH();
if (flags&Z_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x65: /*JNE alias*/
case 0x65: /*JNE alias*/
case 0x75: /*JNE*/
offset=(int8_t)FETCH();
cycles-=4;
if (!(flags&Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
break;
case 0x66: /*JBE alias*/
case 0x66: /*JBE alias*/
case 0x76: /*JBE*/
offset=(int8_t)FETCH();
if (flags&(C_FLAG|Z_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x67: /*JNBE alias*/
case 0x67: /*JNBE alias*/
case 0x77: /*JNBE*/
offset=(int8_t)FETCH();
if (!(flags&(C_FLAG|Z_FLAG))) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x68: /*JS alias*/
case 0x68:
if (is_nec) /*186+ PUSH imm*/
{
tempw = getword();
cpu_state.pc = tempw;
cycles-=2;
FETCHCLEAR();
return;
}
else /*JS alias*/
{
offset=(int8_t)FETCH();
if (flags&N_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
}
break;
case 0x78: /*JS*/
offset=(int8_t)FETCH();
if (flags&N_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x69: /*JNS alias*/
case 0x69:
if (is_nec) /*186+ IMUL*/
{
tempw = geteaw();
tempw2 = getword();
templ = ((int)tempw) * ((int)tempw2);
if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG;
else flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].w = templ & 0xffff;
cycles-=((cpu_mod==3)?14:17);
FETCHCLEAR();
break;
}
else /*JNS alias*/
{
offset=(int8_t)FETCH();
if (!(flags&N_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
}
break;
case 0x79: /*JNS*/
offset=(int8_t)FETCH();
if (!(flags&N_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6A: /*JP alias*/
case 0x6A:
if (is_nec) /*186+ PUSH imm8*/
{
temp = (int8_t)FETCH();
cpu_state.pc = temp;
cycles-=2;
FETCHCLEAR();
return;
}
else /*JP alias*/
{
offset=(int8_t)FETCH();
if (flags&P_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
}
break;
case 0x7A: /*JP*/
offset=(int8_t)FETCH();
if (flags&P_FLAG) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
break;
case 0x6B: /*JNP alias*/
case 0x6B:
if (is_nec) /*186+ IMUL byte*/
{
tempw = geteaw();
tempw2 = (int8_t)FETCH();
if (tempw2 & 0x80) tempw2 |= 0xff00;
templ = ((int)tempw) * ((int)tempw2);
if ((templ >> 15) != 0 && (templ >> 15) != -1) flags |= C_FLAG | V_FLAG;
else flags &= ~(C_FLAG | V_FLAG);
cpu_state.regs[cpu_reg].w = templ & 0xffff;
cycles-=((cpu_mod==3)?14:17);
FETCHCLEAR();
break;
}
else /*JNP alias*/
{
offset=(int8_t)FETCH();
if (!(flags&P_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
cycles-=4;
}
break;
case 0x7B: /*JNP*/
offset=(int8_t)FETCH();
if (!(flags&P_FLAG)) { cpu_state.pc+=offset; cycles-=12; FETCHCLEAR(); }
@@ -2334,12 +2482,15 @@ void execx86(int cycs)
break;
case 0xC8: /*186+ ENTER*/
if (is186)
if (is_nec)
{
uint16_t offsetw;
int count;
offsetw = getword();
tempw=readmemw(ss,SP);
tempw2=readmemw(ss,(SP+2)&0xFFFF);
tempw2=readmemw(ss,(SP-2)&0xFFFF);
tempw3=CS;
tempw4=cpu_state.pc;
@@ -2360,9 +2511,10 @@ void execx86(int cycs)
cycles-=5;
}
cpu_state.last_ea = SP;
SP-=getword();
SP-=offsetw;
cycles-=10;
FETCHCLEAR();
FETCHCLEAR();
break;
}
else /*RETF alias*/
{
@@ -2388,13 +2540,14 @@ void execx86(int cycs)
FETCHCLEAR();
break;
case 0xC9:
if (is186) /*186+ LEAVE*/
if (is_nec) /*186+ LEAVE*/
{
if (cpu_state.ssegs) ss=oldss;
cpu_state.regs[opcode&7].w=readmemw(ss,(SP-2)&0xFFFF);
cpu_state.last_ea = SP;
cycles-=4;
break;
}
else /*RETF alias*/
{

6
src/cpu/cpu.c
View File

@@ -132,7 +132,7 @@ int cpu_waitstates;
int cpu_cache_int_enabled, cpu_cache_ext_enabled;
int cpu_pci_speed;
int is186,
int is_nec,
is286,
is386,
is486,
@@ -244,7 +244,7 @@ cpu_set(void)
CPUID = cpu_s->cpuid_model;
cpuspeed = cpu_s->speed;
is8086 = (cpu_s->cpu_type > CPU_8088);
is186 = (cpu_s->cpu_type == CPU_186);
is_nec = (cpu_s->cpu_type == CPU_NEC);
is286 = (cpu_s->cpu_type >= CPU_286);
is386 = (cpu_s->cpu_type >= CPU_386SX);
israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD);
@@ -397,7 +397,7 @@ cpu_set(void)
{
case CPU_8088:
case CPU_8086:
case CPU_186:
case CPU_NEC:
break;
case CPU_286:

6
src/cpu/cpu.h
View File

@@ -24,7 +24,7 @@
#define CPU_8088 0 /* 808x class CPUs */
#define CPU_8086 1
#define CPU_186 2
#define CPU_NEC 2
#define CPU_286 3 /* 286 class CPUs */
#define CPU_386SX 4 /* 386 class CPUs */
#define CPU_386DX 5
@@ -92,7 +92,7 @@ typedef struct {
extern CPU cpus_8088[];
extern CPU cpus_8086[];
extern CPU cpus_186[];
extern CPU cpus_nec[];
extern CPU cpus_286[];
extern CPU cpus_i386SX[];
extern CPU cpus_i386DX[];
@@ -317,7 +317,7 @@ extern int cpu_multi;
extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
penalties when crossing 8-byte boundaries*/
extern int is8086, is186, is286, is386, is486;
extern int is8086, is_nec, is286, is386, is486;
extern int is_rapidcad, is_pentium;
extern int hasfpu;
extern int cpu_hasrdtsc;

24
src/cpu/cpu_table.c
View File

@@ -53,11 +53,9 @@
CPU cpus_8088[] = {
/*8088 standard*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/10", CPU_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/12", CPU_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/16", CPU_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
@@ -81,21 +79,17 @@ CPU cpus_8086[] = {
{"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8086/9.54", CPU_8086, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8086/10", CPU_8086, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8086/12", CPU_8086, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8086/16", CPU_8086, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_186[] = {
/*80186 standard*/
{"80186/7.16", CPU_186, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/8", CPU_186, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/9.54", CPU_186, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/10", CPU_186, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/12", CPU_186, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/16", CPU_186, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
{"80186/20", CPU_186, 5, 20000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 3},
{"80186/25", CPU_186, 6, 25000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 3},
CPU cpus_nec[] = {
/*NEC V20/30 standard*/
{"V20/7.16", CPU_NEC, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"V20/8", CPU_NEC, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"V20/9.54", CPU_NEC, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"V20/10", CPU_NEC, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"V20/12", CPU_NEC, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"V20/16", CPU_NEC, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};

44
src/machine/machine_table.c
View File

@@ -34,34 +34,34 @@
const machine_t machines[] = {
{ "[8088] AMI XT clone", ROM_AMIXT, "amixt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Compaq Portable", ROM_PORTABLE, "portable", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_xt_compaq_init, NULL },
{ "[8088] DTK XT clone", ROM_DTKXT, "dtk", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] IBM PC", ROM_IBMPC, "ibmpc", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 32, 0, machine_xt_init, NULL },
{ "[8088] AMI XT clone", ROM_AMIXT, "amixt", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Compaq Portable", ROM_PORTABLE, "portable", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_xt_compaq_init, NULL },
{ "[8088] DTK XT clone", ROM_DTKXT, "dtk", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] IBM PC", ROM_IBMPC, "ibmpc", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 32, 0, machine_xt_init, NULL },
{ "[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"Intel", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device },
{ "[8088] IBM XT", ROM_IBMXT, "ibmxt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Generic XT clone", ROM_GENXT, "genxt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] IBM XT", ROM_IBMXT, "ibmxt", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Generic XT clone", ROM_GENXT, "genxt", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"Siemens", cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_HDC | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 15, machine_europc_init, NULL },
{ "[8088] Tandy 1000", ROM_TANDY, "tandy", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, tandy1k_get_device },
{ "[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, tandy1k_hx_get_device },
{ "[8088] Toshiba T1000", ROM_T1000, "t1000", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 512, 1280, 768, 63, machine_xt_t1000_init, NULL },
{ "[8088] Tandy 1000", ROM_TANDY, "tandy", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, tandy1k_get_device },
{ "[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, tandy1k_hx_get_device },
{ "[8088] Toshiba T1000", ROM_T1000, "t1000", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 512, 1280, 768, 63, machine_xt_t1000_init, NULL },
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
{ "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"Intel", cpus_8088}, {"Intel", cpus_186},, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL },
{ "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"Intel", cpus_8088}, {"NEC", cpus_nec},, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL },
#endif
{ "[8088] Xi8088", ROM_XI8088, "xi8088", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 64, 1024, 128, 127, machine_xt_xi8088_init, NULL },
{ "[8088] Xi8088", ROM_XI8088, "xi8088", {{"Intel", cpus_8088}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 64, 1024, 128, 127, machine_xt_xi8088_init, NULL },
{ "[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"Intel", cpus_pc1512}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC2086", ROM_PC2086, "pc2086", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC3086", ROM_PC3086, "pc3086", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC20(0)", ROM_PC200, "pc200", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{ "[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_olim24_init, NULL },
{ "[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 512, 768, 128, 0, machine_tandy1k_init, NULL },
{ "[8086] Toshiba T1200", ROM_T1200, "t1200", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 1024, 2048,1024, 63, machine_xt_t1200_init, NULL },
{ "[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"Intel", cpus_pc1512}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC2086", ROM_PC2086, "pc2086", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC3086", ROM_PC3086, "pc3086", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC20(0)", ROM_PC200, "pc200", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{ "[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_olim24_init, NULL },
{ "[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 512, 768, 128, 0, machine_tandy1k_init, NULL },
{ "[8086] Toshiba T1200", ROM_T1200, "t1200", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 1024, 2048,1024, 63, machine_xt_t1200_init, NULL },
#if defined(DEV_BRANCH) && defined(USE_LASERXT)
{ "[8086] VTech Laser XT3", ROM_LXT3, "lxt3", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 256, 512, 256, 0, machine_xt_laserxt_init, NULL },
{ "[8086] VTech Laser XT3", ROM_LXT3, "lxt3", {{"Intel", cpus_8086}, {"NEC", cpus_nec}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 256, 512, 256, 0, machine_xt_laserxt_init, NULL },
#endif
{ "[286 ISA] AMI 286 clone", ROM_AMI286, "ami286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_neat_ami_init, NULL },