Named initializers for soclet 4's

This commit is contained in:
Jasmine Iwanek
2024-07-21 19:24:16 -04:00
parent 27f83754b2
commit b5f85ba267

View File

@@ -3442,9 +3442,57 @@ const cpu_family_t cpu_families[] = {
.name = "Pentium",
.internal_name = "pentium_p5",
.cpus = (const CPU[]) {
{"50 (Q0399)", CPU_PENTIUM, fpus_internal, 50000000, 1, 5000, 0x513, 0x513, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 4, 4,3,3, 6},
{"60", CPU_PENTIUM, fpus_internal, 60000000, 1, 5000, 0x517, 0x517, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 6, 6,3,3, 7},
{"66", CPU_PENTIUM, fpus_internal, 66666666, 1, 5000, 0x517, 0x517, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 6, 6,3,3, 8},
{
.name = "50 (Q0399)",
.cpu_type = CPU_PENTIUM,
.fpus = fpus_internal,
.rspeed = 50000000,
.multi = 1,
.voltage = 5000,
.edx_reset = 0x513,
.cpuid_model = 0x513,
.cyrix_id = 0,
.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER,
.mem_read_cycles = 4,
.mem_write_cycles = 4,
.cache_read_cycles = 3,
.cache_write_cycles = 3,
.atclk_div = 6
},
{
.name = "60",
.cpu_type = CPU_PENTIUM,
.fpus = fpus_internal,
.rspeed = 60000000,
.multi = 1,
.voltage = 5000,
.edx_reset = 0x517,
.cpuid_model = 0x517,
.cyrix_id = 0,
.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER,
.mem_read_cycles = 6,
.mem_write_cycles = 6,
.cache_read_cycles = 3,
.cache_write_cycles = 3,
.atclk_div = 7
},
{
.name = "66",
.cpu_type = CPU_PENTIUM,
.fpus = fpus_internal,
.rspeed = 66666666,
.multi = 1,
.voltage = 5000,
.edx_reset = 0x517,
.cpuid_model = 0x517,
.cyrix_id = 0,
.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER,
.mem_read_cycles = 6,
.mem_write_cycles = 6,
.cache_read_cycles = 3,
.cache_write_cycles = 3,
.atclk_div = 8
},
{ .name = "", 0 }
}
},
@@ -3454,9 +3502,57 @@ const cpu_family_t cpu_families[] = {
.name = "Pentium OverDrive",
.internal_name = "pentium_p54c_od5v",
.cpus = (const CPU[]) {
{"100", CPU_PENTIUM, fpus_internal, 100000000, 2, 5000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 8, 8,6,6, 12},
{"120", CPU_PENTIUM, fpus_internal, 120000000, 2, 5000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 12,12,6,6, 14},
{"133", CPU_PENTIUM, fpus_internal, 133333333, 2, 5000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 12,12,6,6, 16},
{
.name = "100",
.cpu_type = CPU_PENTIUM,
.fpus = fpus_internal,
.rspeed = 100000000,
.multi = 2,
.voltage = 5000,
.edx_reset = 0x51A,
.cpuid_model = 0x51A,
.cyrix_id = 0,
.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER,
.mem_read_cycles = 8,
.mem_write_cycles = 8,
.cache_read_cycles = 6,
.cache_write_cycles = 6,
.atclk_div = 12
},
{
.name = "120",
.cpu_type = CPU_PENTIUM,
.fpus = fpus_internal,
.rspeed = 120000000,
.multi = 2,
.voltage = 5000,
.edx_reset = 0x51A,
.cpuid_model = 0x51A,
.cyrix_id = 0,
.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER,
.mem_read_cycles = 12,
.mem_write_cycles = 12,
.cache_read_cycles = 6,
.cache_write_cycles = 6,
.atclk_div = 14
},
{
.name = "133",
.cpu_type = CPU_PENTIUM,
.fpus = fpus_internal,
.rspeed = 133333333,
.multi = 2,
.voltage = 5000,
.edx_reset = 0x51A,
.cpuid_model = 0x51A,
.cyrix_id = 0,
.cpu_flags = CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER,
.mem_read_cycles = 12,
.mem_write_cycles = 12,
.cache_read_cycles = 6,
.cache_write_cycles = 6,
.atclk_div = 16
},
{ .name = "", 0 }
}
},