Merge branch 'master' of github.com:86Box/86Box into tc1995
This commit is contained in:
145
src/chipset/opti291.c
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145
src/chipset/opti291.c
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of the OPTi 82C291 chipset.
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* Authors: plant/nerd73
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*
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* Copyright 2020 plant/nerd73.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/keyboard.h>
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#include <86box/mem.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/port_92.h>
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#include <86box/chipset.h>
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typedef struct
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{
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uint8_t index,
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regs[256];
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} opti291_t;
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static void opti291_recalc(opti291_t *dev)
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{
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uint32_t base;
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uint32_t i, shflags, write = 0;
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for (i = 0; i < 4; i++) {
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base = 0xe0000 + (i << 14);
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shflags = (dev->regs[0x24] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
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shflags |= (dev->regs[0x24] & (1 << (i))) ? write : MEM_WRITE_EXTANY;
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write = (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
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mem_set_mem_state(base, 0x4000, shflags);
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}
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for (i = 0; i < 4; i++) {
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base = 0xd0000 + (i << 14);
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shflags = (dev->regs[0x25] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
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shflags |= (dev->regs[0x25] & (1 << (i))) ? write : MEM_WRITE_EXTANY;
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write = (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
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mem_set_mem_state(base, 0x4000, shflags);
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}
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for (i = 0; i < 4; i++) {
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base = 0xc0000 + (i << 14);
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shflags = (dev->regs[0x26] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
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shflags |= (dev->regs[0x26] & (1 << i)) ? write : MEM_WRITE_EXTANY;
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write = (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
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mem_set_mem_state(base, 0x4000, shflags);
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}
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flushmmucache();
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}
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static void
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opti291_write(uint16_t addr, uint8_t val, void *priv)
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{
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opti291_t *dev = (opti291_t *) priv;
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switch (addr) {
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case 0x22:
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dev->index = val;
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break;
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case 0x24:
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pclog("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val);
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dev->regs[dev->index] = val;
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switch(dev->index){
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case 0x21:
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cpu_update_waitstates();
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break;
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case 0x24:
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case 0x25:
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case 0x26:
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case 0x27:
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opti291_recalc(dev);
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break;
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}
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break;
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}
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}
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static uint8_t
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opti291_read(uint16_t addr, void *priv)
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{
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uint8_t ret = 0xff;
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opti291_t *dev = (opti291_t *) priv;
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switch (addr) {
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case 0x24:
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ret = dev->regs[dev->index];
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break;
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}
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return ret;
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}
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static void
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opti291_close(void *priv)
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{
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opti291_t *dev = (opti291_t *) priv;
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free(dev);
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}
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static void *
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opti291_init(const device_t *info)
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{
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opti291_t *dev = (opti291_t *) malloc(sizeof(opti291_t));
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memset(dev, 0, sizeof(opti291_t));
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io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
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io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
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opti291_recalc(dev);
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return dev;
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}
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const device_t opti291_device = {
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"OPTi 82C291",
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0,
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0,
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opti291_init, opti291_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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@@ -61,6 +61,7 @@ extern const device_t ioapic_device;
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/* OPTi */
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extern const device_t opti283_device;
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extern const device_t opti291_device;
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extern const device_t opti493_device;
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extern const device_t opti495_device;
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extern const device_t opti802g_device;
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@@ -240,6 +240,8 @@ extern int machine_at_adi386sx_init(const machine_t *);
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extern int machine_at_commodore_sl386sx_init(const machine_t *);
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extern int machine_at_wd76c10_init(const machine_t *);
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extern int machine_at_awardsx_init(const machine_t *);
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#ifdef EMU_DEVICE_H
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extern const device_t *at_ama932j_get_device(void);
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extern const device_t *at_commodore_sl386sx_get_device(void);
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@@ -515,3 +515,21 @@ machine_at_commodore_sl386sx_init(const machine_t *model)
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return ret;
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}
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int
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machine_at_awardsx_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear(L"roms/machines/awardsx/Unknown 386SX OPTi291 - Award (original).BIN",
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0x000f0000, 65536, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_init(model);
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device_add(&opti291_device);
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device_add(&fdc_at_device);
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return ret;
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}
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@@ -173,7 +173,8 @@ const machine_t machines[] = {
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{ "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL },
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{ "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL },
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{ "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL },
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{ "[OPTi 291] DTK Award 386SX", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_awardsx_init, NULL },
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/* 386SX machines which utilize the MCA bus */
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{ "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
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@@ -572,7 +572,7 @@ CPUOBJ := cpu.o cpu_table.o \
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CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o \
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intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \
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neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o \
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sis_85c310.o sis_85c471.o sis_85c496.o opti283.o \
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sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o \
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via_apollo.o via_vpx.o via_vt82c586b.o via_vt82c596b.o wd76c10.o vl82c480.o \
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amd640.o
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