Fixed the BCM SQ-588 with a kludged, fixes #4431.
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@@ -39,6 +39,7 @@
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#include <86box/spd.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/keyboard.h>
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#include <86box/chipset.h>
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#ifdef ENABLE_SIS_85C50X_LOG
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@@ -257,6 +258,7 @@ sis_85c50x_write(int func, int addr, uint8_t val, void *priv)
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break;
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case 0x5b:
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dev->pci_conf[addr] = val;
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kbc_at_set_fast_reset(!!(val & 0x40));
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break;
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case 0x60: /* SMI */
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if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) {
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@@ -202,6 +202,14 @@ static const uint8_t nont_to_t[256] = {
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0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff
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};
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static uint8_t fast_reset = 0x00;
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void
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kbc_at_set_fast_reset(const uint8_t new_fast_reset)
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{
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fast_reset = new_fast_reset;
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}
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#ifdef ENABLE_KBC_AT_LOG
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int kbc_at_do_log = ENABLE_KBC_AT_LOG;
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@@ -748,7 +756,10 @@ write_p2(atkbc_t *dev, uint8_t val)
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/* AT, PS/2: Handle reset. */
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/* 0 holds the CPU in the RESET state, 1 releases it. To simplify this,
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we just do everything on release. */
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if (!cpu_cpurst_on_sr && ((old ^ val) & 0x01)) { /*Reset*/
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/* TODO: The fast reset flag's condition should be reversed - the BCM SQ-588
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enables the flag and the CPURST on soft reset flag but expects this
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to still soft reset instead. */
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if ((fast_reset || !cpu_cpurst_on_sr) && ((old ^ val) & 0x01)) { /*Reset*/
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if (!(val & 0x01)) { /* Pin 0 selected. */
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/* Pin 0 selected. */
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kbc_at_log("write_p2(): Pulse reset!\n");
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@@ -765,11 +776,12 @@ write_p2(atkbc_t *dev, uint8_t val)
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flushmmucache();
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if (kbc_ven == KBC_VEN_ALI)
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smbase = 0x00030000;
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/* Yes, this is a hack, but until someone gets ahold of the real PCD-2L
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and can find out what they actually did to make it boot from FFFFF0
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correctly despite A20 being gated when the CPU is reset, this will
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have to do. */
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else if (kbc_ven == KBC_VEN_SIEMENS)
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if (kbc_ven == KBC_VEN_SIEMENS)
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is486 ? loadcs(0xf000) : loadcs_2386(0xf000);
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}
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}
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@@ -778,10 +790,10 @@ write_p2(atkbc_t *dev, uint8_t val)
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/* Do this here to avoid an infinite reset loop. */
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dev->p2 = val;
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if (cpu_cpurst_on_sr && ((old ^ val) & 0x01)) { /*Reset*/
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if (!fast_reset && cpu_cpurst_on_sr && ((old ^ val) & 0x01)) { /*Reset*/
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if (!(val & 0x01)) { /* Pin 0 selected. */
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/* Pin 0 selected. */
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pclog("write_p2(): Pulse reset!\n");
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kbc_at_log("write_p2(): Pulse reset!\n");
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dma_reset();
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dma_set_at(1);
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@@ -1833,24 +1845,8 @@ kbc_at_write(uint16_t port, uint8_t val, void *priv)
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if (fast_a20 && dev->wantdata && (dev->command == 0xd1)) {
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kbc_at_log("ATkbc: write P2\n");
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#if 0
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/* Fast A20 - ignore all other bits. */
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val = (val & 0x02) | (dev->p2 & 0xfd);
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/* Bit 2 of AMI flags is P22-P23 blocked (1 = yes, 0 = no),
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discovered by reverse-engineering the AOpeN Vi15G BIOS. */
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if (dev->ami_flags & 0x04) {
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/* If keyboard controller lines P22-P23 are blocked,
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we force them to remain unchanged. */
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val &= ~0x0c;
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val |= (dev->p2 & 0x0c);
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}
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write_p2_fast_a20(dev, val | 0x01);
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#else
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/* Fast A20 - ignore all other bits. */
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write_p2_fast_a20(dev, (dev->p2 & 0xfd) | (val & 0x02));
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#endif
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dev->wantdata = 0;
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dev->state = STATE_MAIN_IBF;
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@@ -1866,6 +1862,11 @@ kbc_at_write(uint16_t port, uint8_t val, void *priv)
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dev->state = STATE_KBC_PARAM;
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dev->command = 0xd1;
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return;
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} else if (fast_reset && ((val & 0xf0) == 0xf0)) {
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pulse_output(dev, val & 0x0f);
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dev->state = STATE_MAIN_IBF;
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return;
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}
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break;
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@@ -2113,6 +2114,8 @@ kbc_at_init(const device_t *info)
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/* The actual keyboard. */
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device_add(&keyboard_at_generic_device);
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fast_reset = 0x00;
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return dev;
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}
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@@ -276,7 +276,9 @@ extern int keyboard_isfsexit_up(void);
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extern int keyboard_ismsexit(void);
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extern void keyboard_set_is_amstrad(int ams);
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extern void kbc_at_set_fast_reset(uint8_t new_fast_reset);
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extern void kbc_at_handler(int set, void *priv);
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extern uint8_t kbc_at_dev_queue_pos(atkbc_dev_t *dev, uint8_t main);
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extern void kbc_at_dev_queue_add(atkbc_dev_t *dev, uint8_t val, uint8_t main);
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extern void kbc_at_dev_reset(atkbc_dev_t *dev, int do_fa);
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