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NCR 53c8xx: Implement the readout of SODL via SBDL when STEST2 bit 7 is set, v3.04 BIOS'es now work.

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OBattler
2024-03-14 01:06:12 +01:00
parent 8c298a5397
commit e1180a77df
1 changed files with 6 additions and 0 deletions
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6
src/scsi/scsi_ncr53c8xx.c
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@@ -280,6 +280,7 @@ typedef struct ncr53c8xx_t {
uint8_t swide; uint8_t swide;
uint8_t gpcntl; uint8_t gpcntl;
uint8_t last_command; uint8_t last_command;
uint8_t sodl;
int command_complete; int command_complete;
ncr53c8xx_request *current; ncr53c8xx_request *current;
@@ -1704,6 +1705,8 @@ ncr53c8xx_reg_writeb(ncr53c8xx_t *dev, uint32_t offset, uint8_t val)
dev->stest3 = val; dev->stest3 = val;
break; break;
case 0x54: case 0x54:
dev->sodl = val;
break;
case 0x55: case 0x55:
break; break;
CASE_SET_REG32(scratchb, 0x5c) CASE_SET_REG32(scratchb, 0x5c)
@@ -1989,6 +1992,9 @@ ncr53c8xx_reg_readb(ncr53c8xx_t *dev, uint32_t offset)
if ((dev->sstat1 & PHASE_MASK) == PHASE_MI) { if ((dev->sstat1 & PHASE_MASK) == PHASE_MI) {
ncr53c8xx_log("NCR 810: Read SBDL %02X\n", dev->msg[0]); ncr53c8xx_log("NCR 810: Read SBDL %02X\n", dev->msg[0]);
return dev->msg[0]; return dev->msg[0];
} else if (dev->stest2 & 0x80) {
ncr53c8xx_log("NCR 810: Read SBDL %02X\n", dev->sodl);
return dev->sodl;
} }
ncr53c8xx_log("NCR 810: Read SBDL 00\n"); ncr53c8xx_log("NCR 810: Read SBDL 00\n");
return 0; return 0;