Eliminated s3->busy completely, fixes S3 928 drivers without FIFO under NT 3.1 while keeping everything else intact.
Moved the DC390 timer initialization to the Flush write command, where it takes a higher priority, fixes NT 3.1 DC390 specific drivers while keeping the AMD branded drivers intact.
This commit is contained in:
@@ -595,7 +595,6 @@ handle_satn_stop(void *priv)
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dev->rregs[ESP_RSEQ] = SEQ_CD;
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esp_log("ESP SCSI Command len = %d, raising IRQ\n", dev->cmdlen);
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esp_raise_irq(dev);
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timer_on_auto(&dev->timer, 10.0);
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}
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}
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@@ -729,6 +728,7 @@ esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val)
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dev->rregs[ESP_RINTR] = INTR_FC;
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dev->rregs[ESP_RSEQ] = 0;
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dev->rregs[ESP_RFLAGS] = 0;
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timer_on_auto(&dev->timer, 10.0);
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break;
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case CMD_RESET:
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esp_pci_soft_reset(dev);
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@@ -2676,7 +2676,7 @@ s3_accel_in(uint16_t port, void *p)
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if (FIFO_FULL && s3->chip >= S3_VISION964)
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temp |= 0xf8; /*FIFO full*/
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} else {
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if (s3->busy || s3->force_busy) {
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if (s3->force_busy) {
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temp |= 0x02; /*Hardware busy*/
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}
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s3->force_busy = 0;
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@@ -3314,10 +3314,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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dstbase >>= 2;
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}
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if (((s3_cpu_src(s3) || s3_cpu_dest(s3))) && (s3->chip >= S3_86C928 && s3->chip < S3_TRIO64V)) {
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s3->busy = 1;
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}
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if ((s3->accel.cmd & 0x100) && (s3_cpu_src(s3) || s3_cpu_dest(s3)) && !cpu_input) {
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s3->force_busy = 1;
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}
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@@ -3410,7 +3406,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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if (s3->bpp == 0) cpu_dat >>= 8;
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else cpu_dat >>= 16;
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if (!s3->accel.sy) {
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s3->busy = 0;
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break;
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}
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@@ -3481,7 +3476,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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else cpu_dat >>= 16;
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if (!s3->accel.sy) {
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s3->busy = 0;
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break;
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}
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@@ -3653,10 +3647,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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s3->accel.dest = dstbase + s3->accel.cy * s3->width;
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s3->accel.sy--;
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if (s3->accel.sy < 0) {
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s3->busy = 0;
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}
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if (cpu_input) {
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if (s3_cpu_dest(s3))
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s3->data_available = 1;
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@@ -3737,7 +3727,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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s3->accel.sy--;
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if (s3->accel.sy < 0) {
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s3->busy = 0;
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return;
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}
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}
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@@ -3825,9 +3814,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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s3->accel.sy--;
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if (s3->accel.sy < 0)
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s3->busy = 0;
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if (cpu_input)
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return;
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@@ -3950,9 +3936,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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s3->accel.sy--;
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if (s3->accel.sy < 0)
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s3->busy = 0;
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if (cpu_input/* && (s3->accel.multifunc[0xa] & 0xc0) == 0x80*/) return;
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if (s3->accel.sy < 0)
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return;
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@@ -4032,7 +4015,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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s3->accel.cur_x2 = s3->accel.poly_cx2 & 0xfff;
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s3->accel.cur_y2 = s3->accel.poly_cy & 0xfff;
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}
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s3->busy = 0;
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break;
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case 11: /*Polygon Fill Pattern (Trio64 only)*/
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@@ -4121,7 +4103,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_
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s3->accel.cur_x2 = s3->accel.poly_cx2 & 0xfff;
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s3->accel.cur_y2 = s3->accel.poly_cy & 0xfff;
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}
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s3->busy = 0;
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break;
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}
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}
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