Replaced calls to flushmmucache_cr3() to direct calls to flushmmucache_nopc() and removed the #define.
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@@ -1683,7 +1683,7 @@ sysexit(uint32_t fetchdat)
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cpu_cur_status &= ~(CPU_STATUS_NOTFLATSS /* | CPU_STATUS_V86*/);
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cpu_cur_status |= (CPU_STATUS_USE32 | CPU_STATUS_STACK32 | CPU_STATUS_PMODE);
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flushmmucache_cr3();
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flushmmucache_nopc();
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set_use32(1);
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set_stack32(1);
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@@ -1804,7 +1804,7 @@ sysret(uint32_t fetchdat)
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cpu_cur_status &= ~(CPU_STATUS_NOTFLATSS /* | CPU_STATUS_V86*/);
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cpu_cur_status |= (CPU_STATUS_USE32 | CPU_STATUS_STACK32 | CPU_STATUS_PMODE);
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flushmmucache_cr3();
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flushmmucache_nopc();
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set_use32(1);
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set_stack32(1);
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@@ -996,7 +996,7 @@ opLOADALL386(uint32_t fetchdat)
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loadall_load_segment(la_addr + 0xc0, &cpu_state.seg_es);
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if (CPL == 3 && oldcpl != 3)
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flushmmucache_cr3();
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flushmmucache_nopc();
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oldcpl = CPL;
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CLOCK_CYCLES(350);
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@@ -461,7 +461,7 @@ op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
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break;
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}
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SEG_CHECK_READ(cpu_state.ea_seg);
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flushmmucache_cr3();
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flushmmucache_nopc();
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CLOCK_CYCLES(12);
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PREFETCH_RUN(12, 2, rmdat, 0, 0, 0, 0, ea32);
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break;
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@@ -580,7 +580,7 @@ loadcs(uint16_t seg)
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do_seg_load(&cpu_state.seg_cs, segdat);
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use32 = (segdat[3] & 0x40) ? 0x300 : 0;
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -609,7 +609,7 @@ loadcs(uint16_t seg)
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cpu_state.seg_cs.access = (cpu_state.eflags & VM_FLAG) ? 0xe2 : 0x82;
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cpu_state.seg_cs.ar_high = 0x10;
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -673,7 +673,7 @@ loadcsjmp(uint16_t seg, uint32_t old_pc)
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do_seg_load(&cpu_state.seg_cs, segdat);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -751,7 +751,7 @@ loadcsjmp(uint16_t seg, uint32_t old_pc)
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CS = seg2;
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do_seg_load(&cpu_state.seg_cs, segdat);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -794,7 +794,7 @@ loadcsjmp(uint16_t seg, uint32_t old_pc)
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cpu_state.seg_cs.access = (cpu_state.eflags & VM_FLAG) ? 0xe2 : 0x82;
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cpu_state.seg_cs.ar_high = 0x10;
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -957,7 +957,7 @@ loadcscall(uint16_t seg)
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CS = seg;
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do_seg_load(&cpu_state.seg_cs, segdat);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1100,7 +1100,7 @@ loadcscall(uint16_t seg)
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CS = seg2;
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do_seg_load(&cpu_state.seg_cs, segdat);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1182,7 +1182,7 @@ loadcscall(uint16_t seg)
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CS = seg2;
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do_seg_load(&cpu_state.seg_cs, segdat);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1227,7 +1227,7 @@ loadcscall(uint16_t seg)
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cpu_state.seg_cs.access = (cpu_state.eflags & VM_FLAG) ? 0xe2 : 0x82;
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cpu_state.seg_cs.ar_high = 0x10;
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1332,7 +1332,7 @@ pmoderetf(int is32, uint16_t off)
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do_seg_load(&cpu_state.seg_cs, segdat);
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cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~(3 << 5)) | ((CS & 3) << 5);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1445,7 +1445,7 @@ pmoderetf(int is32, uint16_t off)
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CS = seg;
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do_seg_load(&cpu_state.seg_cs, segdat);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1697,7 +1697,7 @@ pmodeint(int num, int soft)
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CS = (seg & 0xfffc) | new_cpl;
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cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~0x60) | (new_cpl << 5);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1863,7 +1863,7 @@ pmodeiret(int is32)
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cpu_state.seg_cs.access = 0xe2;
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cpu_state.seg_cs.ar_high = 0x10;
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -1948,7 +1948,7 @@ pmodeiret(int is32)
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do_seg_load(&cpu_state.seg_cs, segdat);
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cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~0x60) | ((CS & 0x0003) << 5);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -2037,7 +2037,7 @@ pmodeiret(int is32)
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do_seg_load(&cpu_state.seg_cs, segdat);
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cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~0x60) | ((CS & 3) << 5);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -2233,7 +2233,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
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CS = new_cs;
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do_seg_load(&cpu_state.seg_cs, segdat2);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -2401,7 +2401,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
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CS = new_cs;
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do_seg_load(&cpu_state.seg_cs, segdat2);
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if ((CPL == 3) && (oldcpl != 3))
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef USE_NEW_DYNAREC
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oldcpl = CPL;
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#endif
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@@ -157,8 +157,6 @@
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mem_set_access((smm ? ACCESS_CPU_SMM : ACCESS_CPU), 1, base, size, is_smram)
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#define mem_set_access_smram_bus(smm, base, size, is_smram) \
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mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram)
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#define flushmmucache_cr3 \
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flushmmucache_nopc
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typedef struct {
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uint16_t x : 5,
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@@ -2319,7 +2319,7 @@ mem_mapping_recalc(uint64_t base, uint64_t size)
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map = map->next;
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}
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flushmmucache_cr3();
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flushmmucache_nopc();
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#ifdef ENABLE_MEM_LOG
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pclog("\nMemory map:\n");
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@@ -246,7 +246,7 @@ sigma_out(uint16_t addr, uint8_t val, void *p)
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return;
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case 0x2DD: /* Page in RAM at 0xC1800 */
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if (sigma->rom_paged != 0)
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flushmmucache_cr3();
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flushmmucache_nopc();
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sigma->rom_paged = 0x00;
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return;
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@@ -290,7 +290,7 @@ sigma_in(uint16_t addr, void *p)
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case 0x2DD: /* Page in ROM at 0xC1800 */
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result = (sigma->rom_paged ? 0x80 : 0);
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if (sigma->rom_paged != 0x80)
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flushmmucache_cr3();
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flushmmucache_nopc();
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sigma->rom_paged = 0x80;
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break;
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case 0x3D1:
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