Corrected MMIO overlap vram. Again.
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@@ -413,6 +413,8 @@ gd54xx_in(uint16_t addr, void *p)
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switch (addr) {
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case 0x3c5:
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if (svga->seqaddr > 5) {
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uint8_t temp;
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switch (svga->seqaddr) {
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case 6:
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return ((svga->seqregs[6] & 0x17) == 0x12) ? 0x12 : 0x0f;
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@@ -421,7 +423,27 @@ gd54xx_in(uint16_t addr, void *p)
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case 0x0f:
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return svga->seqregs[0x0f];
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case 0x17:
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return svga->seqregs[0x17];
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temp = svga->seqregs[0x17];
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temp &= ~(7 << 3);
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if (svga->crtc[0x27] <= CIRRUS_ID_CLGD5429)
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{
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if (gd54xx->vlb)
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temp |= CIRRUS_BUSTYPE_VLBSLOW;
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else
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temp |= CIRRUS_BUSTYPE_ISA;
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}
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else
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{
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if (gd54xx->pci)
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temp |= CIRRUS_BUSTYPE_PCI;
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else if (gd54xx->vlb)
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temp |= CIRRUS_BUSTYPE_VLBSLOW;
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else
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temp |= CIRRUS_BUSTYPE_ISA;
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}
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return temp;
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case 0x1b: case 0x1c: case 0x1d: case 0x1e:
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return gd54xx->vclk_d[svga->seqaddr-0x1b];
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case 0x1f:
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@@ -504,13 +526,10 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
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switch (svga->gdcreg[6] & 0x0C) {
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case 0x0: /*128k at A0000*/
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mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
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mem_mapping_disable(&gd54xx->mmio_mapping);
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svga->banked_mask = 0xffff;
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break;
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case 0x4: /*64k at A0000*/
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mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
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if (svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE) /*This needs to be strictly here otherwise MMIO wouldn't start correctly under CL-GD5429 drivers and up*/
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mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x00100);
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svga->banked_mask = 0xffff;
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break;
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case 0x8: /*32k at B0000*/
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@@ -525,6 +544,10 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
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gd54xx->mmio_vram_overlap = 1;
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break;
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}
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if (svga->seqregs[0x17] & CIRRUS_MMIO_ENABLE)
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mem_mapping_set_addr(&gd54xx->mmio_mapping, 0xb8000, 0x00100);
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else
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mem_mapping_disable(&gd54xx->mmio_mapping);
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} else {
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uint32_t base, size;
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@@ -1811,8 +1834,6 @@ static void
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break;
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}
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svga->seqregs[0x17] = CIRRUS_BUSTYPE_ISA; /*ISA, required by Win3.1 drivers for CL-GD5429 and up*/
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svga->hwcursor.yoff = 32;
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svga->hwcursor.xoff = 0;
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