More fixes, fixes CMOS Setup on the Acrosses AR-B4179.
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@@ -150,7 +150,7 @@ stpc_recalcmapping(stpc_t *dev)
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}
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}
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flushmmucache();
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flushmmucache_nopc();
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}
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@@ -306,6 +306,7 @@ enum SMMRAM_Fields_AMD_K {
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};
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#define ENABLE_386_COMMON_LOG 1
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#ifdef ENABLE_386_COMMON_LOG
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int x386_common_do_log = ENABLE_386_COMMON_LOG;
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@@ -375,7 +375,7 @@ cpu_set(void)
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is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL);
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cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel");
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cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix");
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cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST");
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/* SL-Enhanced Intel 486s have the same SMM save state table layout as Pentiums,
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and the WinChip datasheet claims those are Pentium-compatible as well. AMD Am486DXL/DXL2 also has compatible SMM, or would if not for it's different SMBase*/
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@@ -385,7 +385,8 @@ cpu_set(void)
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is_k6 = (cpu_s->cpu_type >= CPU_K6) && !strcmp(cpu_f->manufacturer, "AMD");
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/* The Samuel 2 datasheet claims it's Celeron-compatible. */
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is_p6 = (cpu_isintel && (cpu_s->cpu_type >= CPU_PENTIUMPRO)) || !strcmp(cpu_f->manufacturer, "VIA");
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is_cxsmm = !strcmp(cpu_f->manufacturer, "Cyrix") && (cpu_s->cpu_type >= CPU_Cx486S);
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is_cxsmm = (!strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST")) &&
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(cpu_s->cpu_type >= CPU_Cx486S);
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hasfpu = (fpu_type != FPU_NONE);
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hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) ||
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@@ -2962,7 +2963,7 @@ cpu_read(uint16_t addr, void *priv)
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if ((cyrix_addr & 0xf0) == 0xc0)
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return 0xff;
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if (cyrix_addr == 0x20 && cpu_s->cpu_type == CPU_Cx5x86)
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if (cyrix_addr == 0x20 && (cpu_s->cpu_type == CPU_Cx5x86))
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return 0xff;
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}
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@@ -586,7 +586,7 @@ const cpu_family_t cpu_families[] = {
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.name = "STPC-DX2",
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.internal_name = "stpc_dx2",
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.cpus = (const CPU[]) {
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{"133", CPU_STPC, fpus_internal, 133333333, 2.0, 3300, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 14,14, 6, 6, 10},
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{"133", CPU_STPC, fpus_internal, 133333333, 2.0, 3300, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 14,14, 6, 6, 10},
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{"", 0}
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}
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}, {
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