MPS table patcher for the ASUS P/I-P65UP5
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@@ -47,6 +47,8 @@ extern const device_t i440ex_device;
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extern const device_t i440bx_device;
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extern const device_t i440zx_device;
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extern const device_t ioapic_device;
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/* OPTi */
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extern const device_t opti495_device;
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extern const device_t opti5x7_device;
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130
src/ioapic.c
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130
src/ioapic.c
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@@ -0,0 +1,130 @@
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Skeleton I/O APIC implementation, currently housing the MPS
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* table patcher for machines that require it.
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*
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*
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*
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* Author: RichardG, <richardg867@gmail.com>
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*
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* Copyright 2020 RichardG.
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*/
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <string.h>
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#include <stdlib.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/device.h>
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#include <86box/machine.h>
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#include <86box/mem.h>
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#include <86box/chipset.h>
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typedef struct {
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uint8_t dummy;
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} ioapic_t;
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#define ENABLE_IOAPIC_LOG 1
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#ifdef ENABLE_IOAPIC_LOG
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int ioapic_do_log = ENABLE_IOAPIC_LOG;
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static void
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ioapic_log(const char *fmt, ...)
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{
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va_list ap;
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if (ioapic_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define ioapic_log(fmt, ...)
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#endif
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static void
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ioapic_write(uint16_t port, uint8_t val, void *priv)
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{
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uint32_t addr, pcmp;
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/* target POST FF, issued by Award before jumping to the bootloader */
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if (val != 0xff)
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return;
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ioapic_log("IOAPIC: Caught POST %02X\n", val);
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/* The _MP_ table must be located in the BIOS area, the EBDA, or the last 1k of conventional
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memory; at a 16-byte boundary in all cases. Award writes both tables to the BIOS area. */
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for (addr = 0xf0000; addr <= 0xfffff; addr += 16) {
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/* check signature for the _MP_ table (Floating Point Structure) */
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if (mem_readl_phys(addr) != 0x5f504d5f) /* ASCII "_MP_" */
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continue;
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/* read and check pointer to the PCMP table (Configuration Table) */
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pcmp = mem_readl_phys(addr + 4);
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if ((pcmp < 0xf0000) || (pcmp > 0xfffff) || (mem_readl_phys(pcmp) != 0x504d4350)) /* ASCII "PCMP" */
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continue;
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/* patch over the signature on both tables */
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ioapic_log("IOAPIC: Patching _MP_ [%08x] and PCMP [%08x] tables\n", addr, pcmp);
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ram[addr] = ram[addr + 1] = ram[addr + 2] = ram[addr + 3] = 0xff;
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ram[pcmp] = ram[pcmp + 1] = ram[pcmp + 2] = ram[pcmp + 3] = 0xff;
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break;
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}
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}
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static void
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ioapic_reset(ioapic_t *dev)
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{
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}
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static void
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ioapic_close(void *priv)
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{
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ioapic_t *dev = (ioapic_t *) priv;
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io_removehandler(0x80, 1,
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NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL);
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free(dev);
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}
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static void *
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ioapic_init(const device_t *info)
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{
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ioapic_t *dev = (ioapic_t *) malloc(sizeof(ioapic_t));
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memset(dev, 0, sizeof(ioapic_t));
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ioapic_reset(dev);
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io_sethandler(0x80, 1,
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NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL);
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return dev;
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}
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const device_t ioapic_device = {
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"I/O APIC",
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DEVICE_AT,
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0,
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ioapic_init, ioapic_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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@@ -176,6 +176,7 @@ machine_at_p65up5_common_init(const machine_t *model, const device_t *northbridg
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&w83877f_device);
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device_add(&intel_flash_bxt_device);
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device_add(&ioapic_device);
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}
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int
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@@ -527,7 +527,7 @@ CPUOBJ := cpu.o cpu_table.o \
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$(DYNARECOBJ)
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CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o \
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intel_4x0.o neat.o opti495.o opti5x7.o scamp.o scat.o \
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intel_4x0.o ioapic.o neat.o opti495.o opti5x7.o scamp.o scat.o \
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rabbit.o sis_85c471.o sis_85c496.o \
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via_apollo.o via_vpx.o wd76c10.o
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@@ -531,7 +531,7 @@ CPUOBJ := cpu.o cpu_table.o \
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$(DYNARECOBJ)
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CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o \
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intel_4x0.o neat.o opti495.o opti5x7.o scamp.o scat.o \
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intel_4x0.o ioapic.o neat.o opti495.o opti5x7.o scamp.o scat.o \
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rabbit.o sis_85c471.o sis_85c496.o \
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via_apollo.o via_vpx.o wd76c10.o
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