OBattler
0476e284cf
Added the ABIT AV4, AMI SiS 460 machine, closes #832 .
2020-12-18 17:59:27 +01:00
Miran Grča
1be6a569f8
Merge pull request #1172 from dhrdlicka/feature/msvc-compat
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MSVC compatibility fixes
2020-12-18 17:11:28 +01:00
Miran Grča
5e91b451fb
Merge pull request #1176 from tiseno100/master
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Early SiS 50x rework
2020-12-18 17:10:59 +01:00
OBattler
7577dbab78
Finished the SiS 50x work and added the two ASUS'es.
2020-12-18 17:09:54 +01:00
Miran Grča
bf4c62746a
Merge pull request #1177 from richardg867/master
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Add ASUS P3V133
2020-12-17 18:20:40 +01:00
Panagiotis
d1e205cff4
Fixed logging & Added the BCM SQ-588
2020-12-17 13:38:10 +02:00
David Hrdlička
a90d03a45d
codegen: fix ARM linkage
2020-12-17 12:06:36 +01:00
David Hrdlička
34422d27dd
codegen: don't use inline asm on MSVC/ARM
2020-12-17 12:06:31 +01:00
Panagiotis
78efeca0da
The SiS 50x can now be compiled
2020-12-17 09:24:16 +02:00
Panagiotis
4b0b03e056
Multiple fixes for the SiS 85C50x
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- Fixed the PCI IRQ setting
- Added a missing register needed to trigger an APM SMI
- Registers with reserved bits are now safe
- The ISA controller is properly implemented
2020-12-17 09:19:51 +02:00
David Hrdlička
251dc45048
codegen: replace asm block with an intrinsic
2020-12-17 01:24:39 +01:00
David Hrdlička
144b19b941
codegen: fix architecture detection on MSVC
2020-12-17 00:58:37 +01:00
David Hrdlička
548dc2a410
resid: don't do CPUID detection on MSVC/x64
2020-12-17 00:36:13 +01:00
RichardG867
1068519960
Fix VT82C686 Super I/O configuration enable bit
2020-12-16 20:17:16 -03:00
David Hrdlička
81bb7aa389
ui: fix 86Box.rc including weird things
2020-12-16 20:43:35 +01:00
David Hrdlička
8be0973d2c
resid: force the GCC CPUID code on clang
2020-12-16 20:43:12 +01:00
David Hrdlička
516bf8d2c8
resid: fix SSE detection
2020-12-16 20:41:15 +01:00
David Hrdlička
5699215ff5
slirp: fix linkage
2020-12-16 20:40:41 +01:00
David Hrdlička
7c76b94821
slirp: rewrite macro to remove void* arithmetic
2020-12-16 20:40:22 +01:00
David Hrdlička
a22b9a0eb5
slirp: fix packed structs on MSVC
2020-12-16 20:39:50 +01:00
David Hrdlička
b11226321e
slirp: don't include unistd.h on Windows
2020-12-16 20:39:15 +01:00
David Hrdlička
339468f25c
network: change sys/time.h include to time.h
2020-12-16 20:35:07 +01:00
David Hrdlička
0af59ef40c
slirp: define ssize_t if it's not already defined
2020-12-16 20:34:51 +01:00
David Hrdlička
1e9cf5594d
voodoo: fix intrinsic includes
2020-12-16 20:34:19 +01:00
David Hrdlička
62647e45de
cpu: force soft FPU on MSVC/x64
2020-12-16 20:34:01 +01:00
David Hrdlička
7e6df1f45c
cpu: convert CPU type enum to sequential
2020-12-16 20:33:24 +01:00
David Hrdlička
53144ed8ec
fix target architecture checks
2020-12-16 20:32:56 +01:00
David Hrdlička
fd554cbcbc
fix WIN64 checks to _WIN64
2020-12-16 20:29:46 +01:00
David Hrdlička
a0c833e970
voodoo: convert variable length arrays to malloc'd
2020-12-16 20:26:34 +01:00
RichardG867
12dc38ac5d
Add ASUS P3V133
2020-12-16 15:37:43 -03:00
RichardG867
378b67584d
Fix VIA 693A issues preventing the ASUS P3V133 from booting
2020-12-16 15:37:12 -03:00
RichardG867
2a19f6048e
Correct W83781D comment: the AS97127F does not have an integrated hardware monitor; motherboards with it still use a discrete W83781D.
2020-12-16 15:35:36 -03:00
richardg867
f1155b8f50
Merge pull request #1171 from Raulonthetest/master
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[REDO] Change the chipset name in ECS P6BAP
2020-12-16 13:41:30 -03:00
Panagiotis
fbab9d8643
Identation fixes
2020-12-16 15:27:58 +02:00
Panagiotis
e05bd5d937
Added Port 92 & ISA bus on the SiS 50x
2020-12-16 15:25:33 +02:00
Panagiotis
61663d9a01
Early SiS 50x rework
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Rewrote the chipset to adopt the new API
2020-12-16 15:08:18 +02:00
Miran Grča
5ab9ef6551
Merge pull request #1175 from richardg867/master
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Enlarge some labels for HiDPI
2020-12-16 10:27:47 +01:00
RichardG867
8fddd74197
Enlarge some labels for HiDPI
2020-12-15 23:00:57 -03:00
Miran Grča
a81703a469
Merge pull request #1169 from EngiNerd89/EngiNerd
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NCR NGA graphics card and PC4i machine
2020-12-14 19:11:21 +01:00
Raul Mario
008f104217
Change chipset name in ECS P6BAP
2020-12-14 18:50:40 +02:00
Raul Mario
118cba921c
Remove misplaced machine table code.
2020-12-14 18:49:47 +02:00
Raul Mario
3b2625736a
Change the chipset name in ECS P6BAP
2020-12-14 18:42:35 +02:00
Miran Grča
4b57f44ed0
Merge pull request #1168 from richardg867/master
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Correct tinyglib data type size macros
2020-12-13 18:59:49 +01:00
RichardG867
3945f528b4
Merge branch 'master' of https://github.com/86Box/86Box
2020-12-13 13:28:44 -03:00
RichardG867
3a07d4d5b2
Correct tinyglib data type size macros, fixes SLiRP on x64
2020-12-13 13:28:31 -03:00
EngiNerd89
4a00adc501
Merge branch 'master' of https://github.com/86Box/86Box.git into EngiNerd
2020-12-13 16:55:52 +01:00
OBattler
7a905168e2
And the same goes for the sequencer registers.
2020-12-13 13:41:32 +01:00
OBattler
e5025d6f5c
Increased the size of the (S)VGA CRTC array to 256 elements (was 128), required by the S3 ViRGE.
2020-12-13 13:37:29 +01:00
OBattler
8737501dbe
Merge branch 'master' of https://github.com/86Box/86Box
2020-12-13 13:36:10 +01:00
OBattler
3c23626eaf
Recorganized the cpu_state struct to be like PCem's, fixes MMX bugs on 64-bit old recompiler (possibly on the new one as well?).
2020-12-13 13:35:58 +01:00
