80486DX2-66/86Box-fork
1
0
Fork 0
Code Issues Pull Requests Activity

MMX clean-ups, part 1.

Browse Source
This commit is contained in:
OBattler
2023-07-16 02:24:36 +02:00
parent 324e5860a0
commit 21e20f1ea2
6 changed files with 1595 additions and 2098 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1221
src/cpu/x86_ops_mmx_arith.h
View File

File diff suppressed because it is too large Load Diff

372
src/cpu/x86_ops_mmx_cmp.h
View File

@@ -1,393 +1,349 @@
static int
opPCMPEQB_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0;
dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0;
dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0;
dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0;
dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0;
dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0;
dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0;
dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
}
dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPEQB_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0;
dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0;
dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0;
dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0;
dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0;
dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0;
dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0;
dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
}
dst->b[0] = (dst->b[0] == src.b[0]) ? 0xff : 0;
dst->b[1] = (dst->b[1] == src.b[1]) ? 0xff : 0;
dst->b[2] = (dst->b[2] == src.b[2]) ? 0xff : 0;
dst->b[3] = (dst->b[3] == src.b[3]) ? 0xff : 0;
dst->b[4] = (dst->b[4] == src.b[4]) ? 0xff : 0;
dst->b[5] = (dst->b[5] == src.b[5]) ? 0xff : 0;
dst->b[6] = (dst->b[6] == src.b[6]) ? 0xff : 0;
dst->b[7] = (dst->b[7] == src.b[7]) ? 0xff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPGTB_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0;
dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0;
dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0;
dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0;
dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0;
dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0;
dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0;
dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
}
dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPGTB_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0;
dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0;
dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0;
dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0;
dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0;
dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0;
dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0;
dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
}
dst->b[0] = (dst->sb[0] > src.sb[0]) ? 0xff : 0;
dst->b[1] = (dst->sb[1] > src.sb[1]) ? 0xff : 0;
dst->b[2] = (dst->sb[2] > src.sb[2]) ? 0xff : 0;
dst->b[3] = (dst->sb[3] > src.sb[3]) ? 0xff : 0;
dst->b[4] = (dst->sb[4] > src.sb[4]) ? 0xff : 0;
dst->b[5] = (dst->sb[5] > src.sb[5]) ? 0xff : 0;
dst->b[6] = (dst->sb[6] > src.sb[6]) ? 0xff : 0;
dst->b[7] = (dst->sb[7] > src.sb[7]) ? 0xff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPEQW_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0;
dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0;
dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0;
dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
}
dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPEQW_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0;
dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0;
dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0;
dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
}
dst->w[0] = (dst->w[0] == src.w[0]) ? 0xffff : 0;
dst->w[1] = (dst->w[1] == src.w[1]) ? 0xffff : 0;
dst->w[2] = (dst->w[2] == src.w[2]) ? 0xffff : 0;
dst->w[3] = (dst->w[3] == src.w[3]) ? 0xffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPGTW_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0;
dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0;
dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0;
dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
}
dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPGTW_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0;
dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0;
dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0;
dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
}
dst->w[0] = (dst->sw[0] > src.sw[0]) ? 0xffff : 0;
dst->w[1] = (dst->sw[1] > src.sw[1]) ? 0xffff : 0;
dst->w[2] = (dst->sw[2] > src.sw[2]) ? 0xffff : 0;
dst->w[3] = (dst->sw[3] > src.sw[3]) ? 0xffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPEQD_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0;
dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
}
dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPEQD_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0;
dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
}
dst->l[0] = (dst->l[0] == src.l[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->l[1] == src.l[1]) ? 0xffffffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPGTD_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
}
dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPCMPGTD_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0;
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
}
dst->l[0] = (dst->sl[0] > src.sl[0]) ? 0xffffffff : 0;
dst->l[1] = (dst->sl[1] > src.sl[1]) ? 0xffffffff : 0;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}

112
src/cpu/x86_ops_mmx_logic.h
View File

@@ -1,50 +1,50 @@
static int
opPAND_a16(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q &= src.q;
dst->q &= src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q &= src.q;
return 0;
}
static int
opPAND_a32(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q &= src.q;
dst->q &= src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q &= src.q;
return 0;
}
@@ -52,50 +52,50 @@ opPAND_a32(uint32_t fetchdat)
static int
opPANDN_a16(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q = ~dst.q & src.q;
dst->q = ~dst->q & src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
return 0;
}
static int
opPANDN_a32(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q = ~dst.q & src.q;
dst->q = ~dst->q & src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
return 0;
}
@@ -103,50 +103,50 @@ opPANDN_a32(uint32_t fetchdat)
static int
opPOR_a16(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q |= src.q;
dst->q |= src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q |= src.q;
return 0;
}
static int
opPOR_a32(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q |= src.q;
dst->q |= src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q |= src.q;
return 0;
}
@@ -154,50 +154,50 @@ opPOR_a32(uint32_t fetchdat)
static int
opPXOR_a16(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q ^= src.q;
dst->q ^= src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q ^= src.q;
return 0;
}
static int
opPXOR_a32(uint32_t fetchdat)
{
MMX_REG src, dst = { 0 };
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst.q ^= src.q;
dst->q ^= src.q;
fpu_state.st_space[cpu_reg].fraction = dst.q;
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else
cpu_state.MM[cpu_reg].q ^= src.q;
return 0;
}

462
src/cpu/x86_ops_mmx_mov.h
View File

@@ -2,175 +2,153 @@ static int
opMOVD_l_mm_a16(uint32_t fetchdat)
{
uint32_t dst;
MMX_REG op;
MMX_REG *op;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op.l[0] = cpu_state.regs[cpu_rm].l;
op.l[1] = 0;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op.l[0] = dst;
op.l[1] = 0;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(2);
}
op->l[0] = cpu_state.regs[cpu_rm].l;
op->l[1] = 0;
CLOCK_CYCLES(1);
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
cpu_state.MM[cpu_reg].l[1] = 0;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].l[0] = dst;
cpu_state.MM[cpu_reg].l[1] = 0;
CLOCK_CYCLES(2);
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
op->l[0] = dst;
op->l[1] = 0;
CLOCK_CYCLES(2);
}
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opMOVD_l_mm_a32(uint32_t fetchdat)
{
uint32_t dst;
MMX_REG op;
MMX_REG *op;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op.l[0] = cpu_state.regs[cpu_rm].l;
op.l[1] = 0;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op.l[0] = dst;
op.l[1] = 0;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(2);
}
op->l[0] = cpu_state.regs[cpu_rm].l;
op->l[1] = 0;
CLOCK_CYCLES(1);
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
cpu_state.MM[cpu_reg].l[1] = 0;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].l[0] = dst;
cpu_state.MM[cpu_reg].l[1] = 0;
CLOCK_CYCLES(2);
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
op->l[0] = dst;
op->l[1] = 0;
CLOCK_CYCLES(2);
}
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opMOVD_mm_l_a16(uint32_t fetchdat)
{
MMX_REG op;
MMX_REG *op;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
cpu_state.regs[cpu_rm].l = op.l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
writememl(easeg, cpu_state.eaaddr, op.l[0]);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
CLOCK_CYCLES(2);
}
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
CLOCK_CYCLES(2);
}
return 0;
}
static int
opMOVD_mm_l_a32(uint32_t fetchdat)
{
MMX_REG op;
MMX_REG *op;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
cpu_state.regs[cpu_rm].l = op.l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
writememl(easeg, cpu_state.eaaddr, op.l[0]);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
CLOCK_CYCLES(2);
}
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
CLOCK_CYCLES(2);
}
return 0;
}
@@ -179,45 +157,79 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
static int
opMOVD_mm_l_a16_cx(uint32_t fetchdat)
{
MMX_REG *op;
if (in_smm)
return opSMINT(fetchdat);
MMX_ENTER();
fetch_ea_16(fetchdat);
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
CLOCK_CYCLES(2);
}
return 0;
}
static int
opMOVD_mm_l_a32_cx(uint32_t fetchdat)
{
MMX_REG *op;
if (in_smm)
return opSMINT(fetchdat);
MMX_ENTER();
fetch_ea_32(fetchdat);
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
cpu_state.regs[cpu_rm].l = op->l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
writememl(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].l[0]);
writememl(easeg, cpu_state.eaaddr, op->l[0]);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
CLOCK_CYCLES(2);
}
return 0;
}
#endif
@@ -226,162 +238,164 @@ static int
opMOVQ_q_mm_a16(uint32_t fetchdat)
{
uint64_t dst;
MMX_REG src, op;
MMX_REG src;
MMX_REG *op;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
op.q = src.q;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op.q = dst;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(2);
}
op->q = src.q;
CLOCK_CYCLES(1);
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].q = dst;
CLOCK_CYCLES(2);
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
op->q = dst;
CLOCK_CYCLES(2);
}
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opMOVQ_q_mm_a32(uint32_t fetchdat)
{
uint64_t dst;
MMX_REG src, op;
MMX_REG src;
MMX_REG *op;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
op = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
op.q = src.q;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
op.q = dst;
fpu_state.st_space[cpu_reg].fraction = op.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(2);
}
op->q = src.q;
CLOCK_CYCLES(1);
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
cpu_state.MM[cpu_reg].q = dst;
CLOCK_CYCLES(2);
SEG_CHECK_READ(cpu_state.ea_seg);
dst = readmemq(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
op->q = dst;
CLOCK_CYCLES(2);
}
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opMOVQ_mm_q_a16(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
CLOCK_CYCLES(2);
}
dst->q = src.q;
CLOCK_CYCLES(1);
if (fpu_softfloat)
fpu_state.st_space[cpu_rm].exp = 0xffff;
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, src.q);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
CLOCK_CYCLES(2);
}
return 0;
}
static int
opMOVQ_mm_q_a32(uint32_t fetchdat)
{
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat) {
if (cpu_mod == 3) {
src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : cpu_state.MM[cpu_reg];
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : &(cpu_state.MM[cpu_rm]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
CLOCK_CYCLES(2);
}
dst->q = src.q;
CLOCK_CYCLES(1);
if (fpu_softfloat)
fpu_state.st_space[cpu_rm].exp = 0xffff;
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, cpu_state.MM[cpu_reg].q);
if (cpu_state.abrt)
return 1;
CLOCK_CYCLES(2);
SEG_CHECK_WRITE(cpu_state.ea_seg);
CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
writememq(easeg, cpu_state.eaaddr, src.q);
if (cpu_state.abrt)
return 1;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
CLOCK_CYCLES(2);
}
return 0;
}

672
src/cpu/x86_ops_mmx_pack.h
View File

@@ -2,635 +2,563 @@ static int
opPUNPCKLDQ_a16(uint32_t fetchdat)
{
uint32_t usrc;
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
if (cpu_mod == 3) {
src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[1] = src.l[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
src.l[0] = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[1] = src.l[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(2);
}
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
usrc = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 0;
cpu_state.MM[cpu_reg].l[1] = usrc;
CLOCK_CYCLES(2);
src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst->l[1] = src.l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
usrc = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 0;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst->l[1] = usrc;
CLOCK_CYCLES(2);
}
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKLDQ_a32(uint32_t fetchdat)
{
uint32_t usrc;
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
if (cpu_mod == 3) {
src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[1] = src.l[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
src.l[0] = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 1;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[1] = src.l[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
CLOCK_CYCLES(2);
}
} else {
if (cpu_mod == 3) {
cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
usrc = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 0;
cpu_state.MM[cpu_reg].l[1] = usrc;
CLOCK_CYCLES(2);
src = fpu_softfloat ? (*(MMX_REG *) &fpu_state.st_space[cpu_rm].fraction) : cpu_state.MM[cpu_rm];
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
if (cpu_mod == 3) {
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst->l[1] = src.l[0];
CLOCK_CYCLES(1);
} else {
SEG_CHECK_READ(cpu_state.ea_seg);
usrc = readmeml(easeg, cpu_state.eaaddr);
if (cpu_state.abrt)
return 0;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
}
dst->l[1] = usrc;
CLOCK_CYCLES(2);
}
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKHDQ_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[0] = dst.l[1];
dst.l[1] = src.l[1];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
cpu_state.MM[cpu_reg].l[1] = src.l[1];
}
dst->l[0] = dst->l[1];
dst->l[1] = src.l[1];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKHDQ_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.l[0] = dst.l[1];
dst.l[1] = src.l[1];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
cpu_state.MM[cpu_reg].l[1] = src.l[1];
}
dst->l[0] = dst->l[1];
dst->l[1] = src.l[1];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKLBW_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[7] = src.b[3];
dst.b[6] = dst.b[3];
dst.b[5] = src.b[2];
dst.b[4] = dst.b[2];
dst.b[3] = src.b[1];
dst.b[2] = dst.b[1];
dst.b[1] = src.b[0];
dst.b[0] = dst.b[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[7] = src.b[3];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
cpu_state.MM[cpu_reg].b[5] = src.b[2];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2];
cpu_state.MM[cpu_reg].b[3] = src.b[1];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
cpu_state.MM[cpu_reg].b[1] = src.b[0];
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
}
dst->b[7] = src.b[3];
dst->b[6] = dst->b[3];
dst->b[5] = src.b[2];
dst->b[4] = dst->b[2];
dst->b[3] = src.b[1];
dst->b[2] = dst->b[1];
dst->b[1] = src.b[0];
dst->b[0] = dst->b[0];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKLBW_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[7] = src.b[3];
dst.b[6] = dst.b[3];
dst.b[5] = src.b[2];
dst.b[4] = dst.b[2];
dst.b[3] = src.b[1];
dst.b[2] = dst.b[1];
dst.b[1] = src.b[0];
dst.b[0] = dst.b[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[7] = src.b[3];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
cpu_state.MM[cpu_reg].b[5] = src.b[2];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[2];
cpu_state.MM[cpu_reg].b[3] = src.b[1];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
cpu_state.MM[cpu_reg].b[1] = src.b[0];
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
}
dst->b[7] = src.b[3];
dst->b[6] = dst->b[3];
dst->b[5] = src.b[2];
dst->b[4] = dst->b[2];
dst->b[3] = src.b[1];
dst->b[2] = dst->b[1];
dst->b[1] = src.b[0];
dst->b[0] = dst->b[0];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKHBW_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = dst.b[4];
dst.b[1] = src.b[4];
dst.b[2] = dst.b[5];
dst.b[3] = src.b[5];
dst.b[4] = dst.b[6];
dst.b[5] = src.b[6];
dst.b[6] = dst.b[7];
dst.b[7] = src.b[7];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
cpu_state.MM[cpu_reg].b[1] = src.b[4];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
cpu_state.MM[cpu_reg].b[3] = src.b[5];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6];
cpu_state.MM[cpu_reg].b[5] = src.b[6];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
cpu_state.MM[cpu_reg].b[7] = src.b[7];
}
dst->b[0] = dst->b[4];
dst->b[1] = src.b[4];
dst->b[2] = dst->b[5];
dst->b[3] = src.b[5];
dst->b[4] = dst->b[6];
dst->b[5] = src.b[6];
dst->b[6] = dst->b[7];
dst->b[7] = src.b[7];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKHBW_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = dst.b[4];
dst.b[1] = src.b[4];
dst.b[2] = dst.b[5];
dst.b[3] = src.b[5];
dst.b[4] = dst.b[6];
dst.b[5] = src.b[6];
dst.b[6] = dst.b[7];
dst.b[7] = src.b[7];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
cpu_state.MM[cpu_reg].b[1] = src.b[4];
cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
cpu_state.MM[cpu_reg].b[3] = src.b[5];
cpu_state.MM[cpu_reg].b[4] = cpu_state.MM[cpu_reg].b[6];
cpu_state.MM[cpu_reg].b[5] = src.b[6];
cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
cpu_state.MM[cpu_reg].b[7] = src.b[7];
}
dst->b[0] = dst->b[4];
dst->b[1] = src.b[4];
dst->b[2] = dst->b[5];
dst->b[3] = src.b[5];
dst->b[4] = dst->b[6];
dst->b[5] = src.b[6];
dst->b[6] = dst->b[7];
dst->b[7] = src.b[7];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKLWD_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[3] = src.w[1];
dst.w[2] = dst.w[1];
dst.w[1] = src.w[0];
dst.w[0] = dst.w[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[3] = src.w[1];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
cpu_state.MM[cpu_reg].w[1] = src.w[0];
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
}
dst->w[3] = src.w[1];
dst->w[2] = dst->w[1];
dst->w[1] = src.w[0];
dst->w[0] = dst->w[0];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKLWD_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[3] = src.w[1];
dst.w[2] = dst.w[1];
dst.w[1] = src.w[0];
dst.w[0] = dst.w[0];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[3] = src.w[1];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
cpu_state.MM[cpu_reg].w[1] = src.w[0];
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
}
dst->w[3] = src.w[1];
dst->w[2] = dst->w[1];
dst->w[1] = src.w[0];
dst->w[0] = dst->w[0];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKHWD_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[0] = dst.w[2];
dst.w[1] = src.w[2];
dst.w[2] = dst.w[3];
dst.w[3] = src.w[3];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
cpu_state.MM[cpu_reg].w[1] = src.w[2];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
cpu_state.MM[cpu_reg].w[3] = src.w[3];
}
dst->w[0] = dst->w[2];
dst->w[1] = src.w[2];
dst->w[2] = dst->w[3];
dst->w[3] = src.w[3];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPUNPCKHWD_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
if (fpu_softfloat)
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.w[0] = dst.w[2];
dst.w[1] = src.w[2];
dst.w[2] = dst.w[3];
dst.w[3] = src.w[3];
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
cpu_state.MM[cpu_reg].w[1] = src.w[2];
cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
cpu_state.MM[cpu_reg].w[3] = src.w[3];
}
dst->w[0] = dst->w[2];
dst->w[1] = src.w[2];
dst->w[2] = dst->w[3];
dst->w[3] = src.w[3];
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPACKSSWB_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.sb[0] = SSATB(dst.sw[0]);
dst.sb[1] = SSATB(dst.sw[1]);
dst.sb[2] = SSATB(dst.sw[2]);
dst.sb[3] = SSATB(dst.sw[3]);
dst.sb[4] = SSATB(src.sw[0]);
dst.sb[5] = SSATB(src.sw[1]);
dst.sb[6] = SSATB(src.sw[2]);
dst.sb[7] = SSATB(src.sw[3]);
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]);
cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]);
cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]);
cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]);
cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
}
dst->sb[0] = SSATB(dst->sw[0]);
dst->sb[1] = SSATB(dst->sw[1]);
dst->sb[2] = SSATB(dst->sw[2]);
dst->sb[3] = SSATB(dst->sw[3]);
dst->sb[4] = SSATB(src.sw[0]);
dst->sb[5] = SSATB(src.sw[1]);
dst->sb[6] = SSATB(src.sw[2]);
dst->sb[7] = SSATB(src.sw[3]);
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPACKSSWB_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.sb[0] = SSATB(dst.sw[0]);
dst.sb[1] = SSATB(dst.sw[1]);
dst.sb[2] = SSATB(dst.sw[2]);
dst.sb[3] = SSATB(dst.sw[3]);
dst.sb[4] = SSATB(src.sw[0]);
dst.sb[5] = SSATB(src.sw[1]);
dst.sb[6] = SSATB(src.sw[2]);
dst.sb[7] = SSATB(src.sw[3]);
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
cpu_state.MM[cpu_reg].sb[1] = SSATB(dst.sw[1]);
cpu_state.MM[cpu_reg].sb[2] = SSATB(dst.sw[2]);
cpu_state.MM[cpu_reg].sb[3] = SSATB(dst.sw[3]);
cpu_state.MM[cpu_reg].sb[4] = SSATB(src.sw[0]);
cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
}
dst->sb[0] = SSATB(dst->sw[0]);
dst->sb[1] = SSATB(dst->sw[1]);
dst->sb[2] = SSATB(dst->sw[2]);
dst->sb[3] = SSATB(dst->sw[3]);
dst->sb[4] = SSATB(src.sw[0]);
dst->sb[5] = SSATB(src.sw[1]);
dst->sb[6] = SSATB(src.sw[2]);
dst->sb[7] = SSATB(src.sw[3]);
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPACKUSWB_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = USATB(dst.sw[0]);
dst.b[1] = USATB(dst.sw[1]);
dst.b[2] = USATB(dst.sw[2]);
dst.b[3] = USATB(dst.sw[3]);
dst.b[4] = USATB(src.sw[0]);
dst.b[5] = USATB(src.sw[1]);
dst.b[6] = USATB(src.sw[2]);
dst.b[7] = USATB(src.sw[3]);
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]);
cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]);
cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]);
cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]);
cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
}
dst->b[0] = USATB(dst->sw[0]);
dst->b[1] = USATB(dst->sw[1]);
dst->b[2] = USATB(dst->sw[2]);
dst->b[3] = USATB(dst->sw[3]);
dst->b[4] = USATB(src.sw[0]);
dst->b[5] = USATB(src.sw[1]);
dst->b[6] = USATB(src.sw[2]);
dst->b[7] = USATB(src.sw[3]);
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPACKUSWB_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
MMX_GETSRC();
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.b[0] = USATB(dst.sw[0]);
dst.b[1] = USATB(dst.sw[1]);
dst.b[2] = USATB(dst.sw[2]);
dst.b[3] = USATB(dst.sw[3]);
dst.b[4] = USATB(src.sw[0]);
dst.b[5] = USATB(src.sw[1]);
dst.b[6] = USATB(src.sw[2]);
dst.b[7] = USATB(src.sw[3]);
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
cpu_state.MM[cpu_reg].b[1] = USATB(dst.sw[1]);
cpu_state.MM[cpu_reg].b[2] = USATB(dst.sw[2]);
cpu_state.MM[cpu_reg].b[3] = USATB(dst.sw[3]);
cpu_state.MM[cpu_reg].b[4] = USATB(src.sw[0]);
cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
}
dst->b[0] = USATB(dst->sw[0]);
dst->b[1] = USATB(dst->sw[1]);
dst->b[2] = USATB(dst->sw[2]);
dst->b[3] = USATB(dst->sw[3]);
dst->b[4] = USATB(src.sw[0]);
dst->b[5] = USATB(src.sw[1]);
dst->b[6] = USATB(src.sw[2]);
dst->b[7] = USATB(src.sw[3]);
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPACKSSDW_a16(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst, dst2;
MMX_ENTER();
fetch_ea_16(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
dst2 = *dst;
MMX_GETSRC();
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.sw[0] = SSATW(dst.sl[0]);
dst.sw[1] = SSATW(dst.sl[1]);
dst.sw[2] = SSATW(src.sl[0]);
dst.sw[3] = SSATW(src.sl[1]);
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
}
dst->sw[0] = SSATW(dst2.sl[0]);
dst->sw[1] = SSATW(dst2.sl[1]);
dst->sw[2] = SSATW(src.sl[0]);
dst->sw[3] = SSATW(src.sl[1]);
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}
static int
opPACKSSDW_a32(uint32_t fetchdat)
{
MMX_REG src, dst;
MMX_REG src;
MMX_REG *dst, dst2;
MMX_ENTER();
fetch_ea_32(fetchdat);
dst = fpu_softfloat ? ((MMX_REG *) &fpu_state.st_space[cpu_reg].fraction) : &(cpu_state.MM[cpu_reg]);
dst2 = *dst;
MMX_GETSRC();
if (fpu_softfloat) {
dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
fpu_state.tag = 0;
fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
dst.sw[0] = SSATW(dst.sl[0]);
dst.sw[1] = SSATW(dst.sl[1]);
dst.sw[2] = SSATW(src.sl[0]);
dst.sw[3] = SSATW(src.sl[1]);
fpu_state.st_space[cpu_reg].fraction = dst.q;
fpu_state.st_space[cpu_reg].exp = 0xffff;
} else {
dst = cpu_state.MM[cpu_reg];
cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
}
dst->sw[0] = SSATW(dst2.sl[0]);
dst->sw[1] = SSATW(dst2.sl[1]);
dst->sw[2] = SSATW(src.sl[0]);
dst->sw[3] = SSATW(src.sl[1]);
if (fpu_softfloat)
fpu_state.st_space[cpu_reg].exp = 0xffff;
return 0;
}

854
src/cpu/x86_ops_mmx_shift.h
View File

File diff suppressed because it is too large Load Diff