80486DX2-66/86Box-fork
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Fix STPC CPU identification

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Let port 22h/23h registers >= 0xc0 fall through to the Cyrix port 22h/23h code in cpu.c
This commit is contained in:
RichardG867
2020-07-07 15:38:34 -03:00
parent eb955eecf9
commit 5e18163b2e
2 changed files with 6 additions and 4 deletions
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2
src/chipset/stpc.c
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@@ -492,6 +492,8 @@ stpc_reg_read(uint16_t addr, void *priv)
if (addr == 0x22)
ret = dev->reg_offset;
else if (dev->reg_offset >= 0xc0)
return 0xff; /* Cyrix CPU registers: let the CPU code handle those */
else
ret = dev->regs[dev->reg_offset];

8
src/cpu/cpu_table.c
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@@ -368,10 +368,10 @@ CPU cpus_Cx486[] = {
#if defined(DEV_BRANCH) && defined(USE_STPC)
CPU cpus_STPC[] = {
{"STPC 66", CPU_Cx486DX2, fpus_internal, 66666666, 1.0, 0x430, 0, 0x001a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8}, /* timings assumed */
{"STPC 75", CPU_Cx486DX2, fpus_internal, 75000000, 1.0, 0x430, 0, 0x001a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
{"STPC 100", CPU_Cx486DX2, fpus_internal, 100000000, 1.0, 0x430, 0, 0x001a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
{"STPC 133", CPU_Cx486DX2, fpus_internal, 133333333, 2.0, 0x430, 0, 0x001b, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
{"STPC 66", CPU_Cx486DX2, fpus_internal, 66666666, 1.0, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8}, /* timings assumed */
{"STPC 75", CPU_Cx486DX2, fpus_internal, 75000000, 1.0, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
{"STPC 100", CPU_Cx486DX2, fpus_internal, 100000000, 1.0, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
{"STPC 133", CPU_Cx486DX2, fpus_internal, 133333333, 2.0, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12, 6, 6, 8},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
};
#endif