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Fixed PIIX MIRQ routing so MIRQ1 routing is no longer incorrectly applied to MIRQ0.

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OBattler
2021-06-10 05:07:32 +02:00
parent 0ecbb8f7d6
commit 73bdd27ba8
1 changed files with 2 additions and 2 deletions
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4
src/chipset/intel_piix.c
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@@ -396,9 +396,9 @@ piix_write(int func, int addr, uint8_t val, void *priv)
else
fregs[addr] = val & 0xcf;
if (val & 0x80)
pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED);
pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), PCI_IRQ_DISABLED);
else
pci_set_mirq_routing(PCI_MIRQ0, val & 0xf);
pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf);
piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled");
}
break;