Merge branch 'master' into opengl

This commit is contained in:
ts-korhonen
2021-04-17 13:47:10 +03:00
5 changed files with 37 additions and 27 deletions

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@@ -1325,8 +1325,8 @@ static void
regs[0x52] = 0xc3; /* 512 kB writeback cache */
regs[0x57] = 0x31;
regs[0x59] = 0x0f;
regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = 0x02;
dev->max_drb = 5;
regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02;
dev->max_drb = 3;
dev->drb_unit = 4;
dev->drb_default = 0x02;
break;
@@ -1342,9 +1342,8 @@ static void
regs[0x50] |= 0x01;
regs[0x51] = 0x80;
regs[0x52] = 0xea; /* 512 kB burst cache, set to 0xaa for 256 kB */
regs[0x57] = 0x31;
regs[0x59] = 0x0f;
regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = regs[0x64] = regs[0x65] = 0x02;
regs[0x60] = regs[0x61] = regs[0x62] = regs[0x63] = 0x02;
dev->max_drb = 5;
dev->drb_unit = 4;
dev->drb_default = 0x02;

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@@ -762,6 +762,7 @@ cpu_set(void)
case CPU_i486DX:
case CPU_Am486SX:
case CPU_Am486DX:
case CPU_Am486DXL:
case CPU_ENH_Am486DX:
/*AMD timing identical to Intel*/
#ifdef USE_DYNAREC

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@@ -84,28 +84,29 @@ enum {
enum {
CPU_PKG_8088 = (1 << 0),
CPU_PKG_8088_EUROPC = (1 << 1),
CPU_PKG_8086 = (1 << 2),
CPU_PKG_286 = (1 << 3),
CPU_PKG_386SX = (1 << 4),
CPU_PKG_386DX = (1 << 5),
CPU_PKG_M6117 = (1 << 6),
CPU_PKG_386SLC_IBM = (1 << 7),
CPU_PKG_486SLC = (1 << 8),
CPU_PKG_486SLC_IBM = (1 << 9),
CPU_PKG_486BL = (1 << 10),
CPU_PKG_486DLC = (1 << 11),
CPU_PKG_SOCKET1 = (1 << 12),
CPU_PKG_SOCKET3 = (1 << 13),
CPU_PKG_SOCKET3_PC330 = (1 << 14),
CPU_PKG_STPC = (1 << 15),
CPU_PKG_SOCKET4 = (1 << 16),
CPU_PKG_SOCKET5_7 = (1 << 17),
CPU_PKG_SOCKET8 = (1 << 18),
CPU_PKG_SLOT1 = (1 << 19),
CPU_PKG_SLOT2 = (1 << 20),
CPU_PKG_SOCKET370 = (1 << 21),
CPU_PKG_EBGA368 = (1 << 22)
CPU_PKG_8088_PCJR = (1 << 1),
CPU_PKG_8088_EUROPC = (1 << 2),
CPU_PKG_8086 = (1 << 3),
CPU_PKG_286 = (1 << 4),
CPU_PKG_386SX = (1 << 5),
CPU_PKG_386DX = (1 << 6),
CPU_PKG_M6117 = (1 << 7),
CPU_PKG_386SLC_IBM = (1 << 8),
CPU_PKG_486SLC = (1 << 9),
CPU_PKG_486SLC_IBM = (1 << 10),
CPU_PKG_486BL = (1 << 11),
CPU_PKG_486DLC = (1 << 12),
CPU_PKG_SOCKET1 = (1 << 13),
CPU_PKG_SOCKET3 = (1 << 14),
CPU_PKG_SOCKET3_PC330 = (1 << 15),
CPU_PKG_STPC = (1 << 16),
CPU_PKG_SOCKET4 = (1 << 17),
CPU_PKG_SOCKET5_7 = (1 << 18),
CPU_PKG_SOCKET8 = (1 << 19),
CPU_PKG_SLOT1 = (1 << 20),
CPU_PKG_SLOT2 = (1 << 21),
CPU_PKG_SOCKET370 = (1 << 22),
CPU_PKG_EBGA368 = (1 << 23)
};

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@@ -82,6 +82,15 @@ const cpu_family_t cpu_families[] = {
{"16", CPU_8088, fpus_8088, 16000000, 1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
{"", 0}
}
}, {
.package = CPU_PKG_8088_PCJR,
.manufacturer = "Intel",
.name = "8088",
.internal_name = "8088",
.cpus = (const CPU[]) {
{"4.77", CPU_8088, fpus_8088, 4772728, 1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
{"", 0}
}
}, {
.package = CPU_PKG_8088_EUROPC,
.manufacturer = "Intel",

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@@ -59,7 +59,7 @@ const machine_t machines[] = {
/* 8088 Machines */
{ "[8088] IBM PC (1981)", "ibmpc", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 16, 64, 16, 0, machine_pc_init, NULL },
{ "[8088] IBM PC (1982)", "ibmpc82", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 256, 256, 256, 0, machine_pc82_init, NULL },
{ "[8088] IBM PCjr", "ibmpcjr", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO_FIXED, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device },
{ "[8088] IBM PCjr", "ibmpcjr", MACHINE_TYPE_8088, CPU_PKG_8088_PCJR, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO_FIXED, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device },
{ "[8088] IBM XT (1982)", "ibmxt", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 256, 64, 0, machine_xt_init, NULL },
{ "[8088] IBM XT (1986)", "ibmxt86", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 256, 640, 64, 0, machine_xt86_init, NULL },
{ "[8088] American XT Computer", "americxt", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 640, 64, 0, machine_xt_americxt_init, NULL },