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@@ -88,7 +88,6 @@ w83977f_fdc_handler(w83977f_t *dev)
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fdc_remove(dev->fdc);
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pclog("fdc: %02X %02X %04X\n", dev->dev_regs[0][0x00], dev->regs[0x22], io_base);
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if ((dev->dev_regs[0][0x00] & 0x01) && (dev->regs[0x22] & 0x01) && (io_base >= 0x100) && (io_base <= 0xff8))
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fdc_set_base(dev->fdc, io_base);
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@@ -153,8 +152,6 @@ w83977f_write(uint16_t port, uint8_t val, void *priv)
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uint8_t valxor = 0;
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uint8_t ld = dev->regs[7];
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pclog("W83977F Write: %04X %02X\n", port, val);
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if (index) {
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if ((val == 0x87) && !dev->locked) {
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if (dev->tries) {
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@@ -191,8 +188,8 @@ w83977f_write(uint16_t port, uint8_t val, void *priv)
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switch (dev->cur_reg) {
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case 0x02:
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if (valxor & 0x02)
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softresetx86();
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/* if (valxor & 0x02)
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softresetx86(); */
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break;
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case 0x22:
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if (valxor & 0x20)
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@@ -205,8 +202,11 @@ w83977f_write(uint16_t port, uint8_t val, void *priv)
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w83977f_fdc_handler(dev);
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break;
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case 0x26:
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if (valxor & 0x40)
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w83977f_remap(dev);
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if (valxor & 0x20)
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dev->rw_locked = (val & 0x20) ? 1 : 0;
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break;
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case 0x30:
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if (valxor & 0x01) switch (ld) {
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case 0x00:
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@@ -329,8 +329,6 @@ w83977f_read(uint16_t port, void *priv)
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}
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}
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pclog("W83977F Read: %04X %02X\n", port, ret);
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return ret;
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}
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@@ -344,8 +342,13 @@ w83977f_reset(w83977f_t *dev)
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for (i = 0; i < 256; i++)
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memset(dev->dev_regs[i], 0, 208);
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dev->regs[0x20] = 0x97;
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dev->regs[0x21] = dev->type ? 0x73 : 0x71;
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if (dev->type < 2) {
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dev->regs[0x20] = 0x97;
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dev->regs[0x21] = dev->type ? 0x73 : 0x71;
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} else {
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dev->regs[0x20] = 0x52;
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dev->regs[0x21] = 0xf0;
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}
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dev->regs[0x22] = 0xff;
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dev->regs[0x24] = dev->type ? 0x84 : 0xa4;
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@@ -368,9 +371,9 @@ w83977f_reset(w83977f_t *dev)
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dev->dev_regs[1][0x30] = 0x03; dev->dev_regs[1][0x31] = 0x78;
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dev->dev_regs[1][0x40] = 0x07;
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if (!dev->type)
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dev->dev_regs[1][0x41] = 0x02; /* Read-only */
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dev->dev_regs[1][0x41] = 0x01 /*0x02*/; /* Read-only */
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dev->dev_regs[1][0x44] = 0x04;
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dev->dev_regs[1][0xc0] = 0x3c; /* The datasheet says default is 3f, but also default is priner mode. */
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dev->dev_regs[1][0xc0] = 0x3c; /* The datasheet says default is 3f, but also default is printer mode. */
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/* Logical Device 2 (UART A) */
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dev->dev_regs[2][0x00] = 0x01;
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@@ -404,6 +407,7 @@ w83977f_reset(w83977f_t *dev)
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if (!dev->type)
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dev->dev_regs[5][0x01] = 0x02;
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dev->dev_regs[5][0x30] = 0x00; dev->dev_regs[5][0x31] = 0x60;
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dev->dev_regs[5][0x32] = 0x00; dev->dev_regs[5][0x33] = 0x64;
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dev->dev_regs[5][0x40] = 0x01;
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if (!dev->type)
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dev->dev_regs[5][0x41] = 0x02; /* Read-only */
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@@ -448,10 +452,12 @@ w83977f_reset(w83977f_t *dev)
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/* Logical Device 9 (Auxiliary I/O Part III) */
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if (dev->type) {
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dev->dev_regs[7][0xb0] = 0x01; dev->dev_regs[7][0xb1] = 0x01;
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dev->dev_regs[7][0xb2] = 0x01; dev->dev_regs[7][0xb3] = 0x01;
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dev->dev_regs[7][0xb4] = 0x01; dev->dev_regs[7][0xb5] = 0x01;
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dev->dev_regs[7][0xb6] = 0x01; dev->dev_regs[7][0xb7] = 0x01;
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dev->dev_regs[9][0xb0] = 0x01; dev->dev_regs[9][0xb1] = 0x01;
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dev->dev_regs[9][0xb2] = 0x01; dev->dev_regs[9][0xb3] = 0x01;
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dev->dev_regs[9][0xb4] = 0x01; dev->dev_regs[9][0xb5] = 0x01;
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dev->dev_regs[9][0xb6] = 0x01; dev->dev_regs[9][0xb7] = 0x01;
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dev->dev_regs[10][0xc0] = 0x8f;
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}
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fdc_reset(dev->fdc);
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@@ -517,3 +523,13 @@ const device_t w83977tf_device = {
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NULL, NULL, NULL,
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NULL
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};
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const device_t w83977ef_device = {
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"Winbond W83977TF Super I/O",
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0,
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2,
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w83977f_init, w83977f_close, NULL,
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NULL, NULL, NULL,
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NULL
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};
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