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FDC: Disable DSR reset on the PS/1-2011/2121 / PS/2-30 FDC.

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OBattler
2024-04-02 23:31:44 +02:00
parent c6289fd85a
commit c8a1843cdf
1 changed files with 16 additions and 14 deletions
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30
src/floppy/fdc.c
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@@ -780,24 +780,26 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
} }
return; return;
case 4: case 4:
if (!(val & 0x80)) { if (!(fdc->flags & FDC_FLAG_PS1)) {
timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); if (!(val & 0x80)) {
fdc->interrupt = -6;
}
if (fdc->power_down || ((val & 0x80) && !(fdc->dsr & 0x80))) {
if (fdc->power_down) {
timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC);
fdc->interrupt = -5;
} else {
timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
fdc->interrupt = -1; fdc->interrupt = -6;
}
if (fdc->power_down || ((val & 0x80) && !(fdc->dsr & 0x80))) {
if (fdc->power_down) {
timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC);
fdc->interrupt = -5;
} else {
timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
fdc->interrupt = -1;
fdc->perp &= 0xfc; fdc->perp &= 0xfc;
for (i = 0; i < FDD_NUM; i++) for (i = 0; i < FDD_NUM; i++)
ui_sb_update_icon(SB_FLOPPY | i, 0); ui_sb_update_icon(SB_FLOPPY | i, 0);
fdc_ctrl_reset(fdc); fdc_ctrl_reset(fdc);
}
} }
} }
fdc->dsr = val; fdc->dsr = val;