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The SMSC southbridge now initializes IDE regiters 0x45 and 0x46 to the correct values.

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OBattler
2020-10-13 21:49:55 +02:00
parent 55920d8afd
commit f465066ed2
1 changed files with 2 additions and 0 deletions
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src/chipset/intel_piix.c
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@@ -1055,6 +1055,8 @@ piix_reset_hard(piix_t *dev)
if (dev->type == 5) {
fregs[0x3c] = 0x0e;
fregs[0x3d] = 0x01;
fregs[0x45] = 0x55;
fregs[0x46] = 0x01;
}
if ((dev->type == 1) && (dev->rev == 2))
dev->max_func = 0; /* It starts with IDE disabled, then enables it. */