Commit Graph

3450 Commits

Author SHA1 Message Date
OBattler
68a3e16b0b Fixed the AP440FX PCI slots. 2020-06-15 19:26:32 +02:00
OBattler
4def080e9e Merge pull request #810 from amdk6/master
Implementation of the Intel AP440FX motherboard
2020-06-15 17:12:21 +02:00
OBattler
6d888cf869 Merge pull request #809 from nerd73/master
Preliminary port of PCem's FPU timing emulation
2020-06-15 17:12:08 +02:00
OBattler
6c6cae0965 Fixed a number of bug sin various modules, VS440FX mostly works now (one bug on soft reset is missing which is left to be debugged). 2020-06-15 17:08:42 +02:00
Gey Cunt
d0fa341675 Added the Intel AP440FX 2020-06-15 15:20:16 +03:00
nerd73
a4d33513e4 Preliminary port of PCem's FPU timing emulation 2020-06-15 04:11:12 -06:00
OBattler
1d27587182 Merge pull request #808 from tiseno100/master
Added the Intel 440FX AMI boards
2020-06-15 11:01:31 +02:00
tiseno100
a7cdbc50c0 Disable CPU logging 2020-06-15 11:38:00 +03:00
tiseno100
47290280b1 Implemented the Intel 440FX boards and the Poisk 2
Prior to the PC87307 addition, the Intel 440FX boards can finally be added
2020-06-15 11:37:24 +03:00
OBattler
1c354f6777 Disabled PCI logging. 2020-06-14 22:07:37 +02:00
OBattler
8837d5d882 Implemented the National Semiconductors PC87307, PC87309, PC87332, and PC97307 Super I/O chips, fixed a number of bugs, and removed two machines from the Dev branch due to them now having the correct Super I/O chips. 2020-06-14 21:59:45 +02:00
OBattler
eae3f9b030 Merge branch 'master' of https://github.com/86Box/86Box 2020-06-14 14:50:48 +02:00
OBattler
611dd62fab Some chipset extended SMRAM-related clean-ups and SMM-supporting chipsets now correctly set shadow RAM states for SMM mode in addition to non-SMM mode, fixes Windows 98 SE hanging in a SMI# handler. 2020-06-14 14:50:30 +02:00
David Hrdlička
58336051df munt: fix include 2020-06-13 20:54:28 +02:00
OBattler
e746069737 Fix for the keyboard controller for the Intel AMI 430LX and 430NX BIOS'es and their Ambra counterparts. 2020-06-13 19:32:06 +02:00
OBattler
ca55e2a12a More reorganization and finally merged the two makefiles. 2020-06-13 12:32:09 +02:00
OBattler
4e48943ad5 Moved the recompiler timings to cpu/ because they are common to both recompilers and fixed a bug in the common timings header file. 2020-06-13 11:12:28 +02:00
OBattler
60ba71cb4b Renamed the three CPU folders to their final names. 2020-06-13 10:54:05 +02:00
OBattler
395537070b Renamed the three CPU folders to their final names. 2020-06-13 10:53:11 +02:00
OBattler
dc7983902e Fixed some wrong letter casing in cdrom/cdrom_image_backend.c and updated Makefile.local. 2020-06-13 10:44:18 +02:00
OBattler
cfea8c4b64 Removed the USB variable from the makefile as it's no longer needed and only causes confusion. 2020-06-13 10:28:58 +02:00
OBattler
ebe07c7e82 Moved the two (unused) Intel 386 chipset files to chipset/. 2020-06-13 10:27:07 +02:00
OBattler
9c6f0d806e A slight reorganization of the source tree and fixed a warning in disk/mo.c. 2020-06-13 10:17:57 +02:00
OBattler
d94db23979 Re-added the built-in NCR 53c810 PCI SCSI controller to the ASUS PCI/I-486SP3G. 2020-06-12 23:34:43 +02:00
OBattler
92a1425896 Implemented the Intel 420EX combined northbridge and southbridge, added the ASUS PVI-486AP4, and overhauled SMRAM handling (which also implements some previously missing extended SMRAM features of the 440BX+ and VIA Apollo series of chipsets). 2020-06-12 23:29:12 +02:00
OBattler
2920ad25f3 Merge pull request #802 from tiseno100/master
Added the Acer V60N
2020-06-12 21:31:05 +02:00
tiseno100
95088eac1d Added back the missing V60N configuration 2020-06-12 21:02:37 +03:00
tiseno100
622f34522f The Tyan & the Supermicro no longer need the incompatible VIA C3. 2020-06-12 21:01:21 +03:00
tiseno100
298d25a6da Added 2 missing MSR's. Fixes the Tyan Tsunami ATX & SuperMicro P6SBA hate on i686 CPU's 2020-06-12 20:58:13 +03:00
tiseno100
5956d22d06 Replaced the position of PCI reg 0x0c as it was causing problems if you allocated many PCI cards 2020-06-12 19:35:21 +03:00
tiseno100
3988f6fa45 Added the Acer V60N
An i686 Acer BIOS board. Works as intended
2020-06-12 19:18:28 +03:00
OBattler
a09e4a939f Merge branch 'master' of https://github.com/86Box/86Box 2020-06-12 17:25:22 +02:00
OBattler
42508ceb52 Implemented i686 MSR 404. 2020-06-12 17:24:58 +02:00
OBattler
0cc234f0de Merge pull request #801 from tiseno100/master
Fix the Gateway 2000's PCI registers
2020-06-12 08:22:34 +02:00
tiseno100
f7a71a179d Fix the Gateway 2000's PCI registers 2020-06-12 09:20:12 +03:00
OBattler
cd1c84c449 Merge pull request #797 from anabate123/master
Added the Gateway 2000 OEM-based Zappa ROM
2020-06-11 16:04:21 +02:00
OBattler
85073c1b7b Merge pull request #796 from driver1998/mingw
snd_gus: Fix filename case for building on Linux.
2020-06-11 16:04:11 +02:00
OBattler
98b57912b3 Removed excess DMA logging. 2020-06-11 13:50:35 +02:00
OBattler
a260f2913e Fixed the PCI slots on the HP Brio. 2020-06-11 13:40:23 +02:00
OBattler
244874ed61 Merge branch 'master' of https://github.com/86Box/86Box 2020-06-11 12:53:06 +02:00
OBattler
464a6da62f Intel SIO overhaul, slight DMA clean-ups and SIO-related additions, made the PIIX/SMSC series of southbridges aware of CPU speed changes, and fixed a bug in the 86F loading code. 2020-06-11 12:52:50 +02:00
anabate123
b757297559 Fixed identing in machine.h 2020-06-11 06:07:37 -04:00
anabate123
2a587e3072 Update machine_table.c
I want to see if I could add the Gateway 2000 OEM-based Zappa ROM.
2020-06-10 18:48:55 -04:00
anabate123
226966101e Update machine.h
I want to see if I can add the Gateway 2000 OEM-based Zappa ROM.
2020-06-10 18:45:35 -04:00
anabate123
cea9298491 Update m_at_socket4_5.c
I want to see if I can add the Gateway 2000 OEM-based Zappa ROM
2020-06-10 18:43:21 -04:00
GH Cao
2c29f63a9d snd_gus: Fix filename case for building on Linux. 2020-06-11 02:42:58 +08:00
OBattler
563a432b7e Merge pull request #791 from richardg867/master
MPS table patcher for the ASUS P/I-P65UP5
2020-06-08 23:50:18 +02:00
OBattler
2e257225b0 Merge pull request #793 from tiseno100/master
Added the Abit LX6 + rework on the 440GX
2020-06-08 23:50:02 +02:00
tiseno100
d46da3efa1 Fixed wrong CPUID's on the Pentium II Xeons
Also added some \**bus based** speeds
2020-06-09 00:47:36 +03:00
tiseno100
d02af0a43c Replaced the S2DGE with the GA-6DXU
More stable and has everything we emulate other than it's On-Board SCSI. Works as intended.
2020-06-09 00:38:00 +03:00