Commit Graph

5405 Commits

Author SHA1 Message Date
Miran Grča
6bd2ba28ce Merge pull request #1483 from EngiNerd89/EngiNerd
Fixed Philips P3120 FDC bug
2021-06-14 00:55:28 +02:00
EngiNerd89
2d97a02473 Merge branch 'master' of https://github.com/86Box/86Box.git into EngiNerd 2021-06-13 21:45:53 +02:00
OBattler
73bdd27ba8 Fixed PIIX MIRQ routing so MIRQ1 routing is no longer incorrectly applied to MIRQ0. 2021-06-10 05:07:32 +02:00
OBattler
0ecbb8f7d6 Fixed a small mess-up that messed up all Intel Flash chips, the Bora Pro should now work again. 2021-06-08 20:33:22 +02:00
OBattler
29018a35d8 Fixed 512k Intel Flash chips. 2021-06-08 07:33:29 +02:00
OBattler
4be8bbb704 Some changes to io.c/h. 2021-06-07 00:22:12 +02:00
OBattler
bfbb4b9655 PCI now supports a fourth MIRQ. 2021-06-07 00:20:04 +02:00
OBattler
cc310d663f Slight GC100 rework. 2021-06-07 00:18:33 +02:00
OBattler
51b88518b8 Some mem.c reset organization. 2021-06-07 00:17:29 +02:00
OBattler
149ecab64a New logging system, currently not used by anything. 2021-06-07 00:17:03 +02:00
OBattler
7d3ed9b397 Added the fatal_ex() function to 86box.h. 2021-06-07 00:15:52 +02:00
OBattler
63a5c3a281 Some indentation changes in 86box.c and added a fatal_ex() function. 2021-06-07 00:15:09 +02:00
OBattler
f0da82fa2b The LG Prime3C no longer calls the IDE handler on register write if it is the variant without IDE. 2021-06-07 00:12:53 +02:00
OBattler
dc6e07a162 SMC FDC73C93x Super I/O chip fixes. 2021-06-07 00:11:45 +02:00
OBattler
80a6f81a97 SM(S)C FDC37M60x Super I/O chip rewrite. 2021-06-07 00:10:56 +02:00
OBattler
195ebd66a5 Removed a thing in nvr.h. 2021-06-07 00:10:05 +02:00
OBattler
40b0db4162 And another CPU change. 2021-06-07 00:07:27 +02:00
OBattler
166f64d422 Some CPU fixes, should fix compiling. 2021-06-07 00:06:17 +02:00
OBattler
59d1469a07 Intel 420EX fixes. 2021-06-06 23:59:05 +02:00
OBattler
32dff0b5a1 OPTi 283 rewrite. 2021-06-06 23:58:12 +02:00
OBattler
493867f476 Minor AT NVR fixes, fixes deep beeps on the Intel Premiere/PCI. 2021-06-06 23:57:26 +02:00
OBattler
50af9387f8 Makes PIIX board configuration registers work again - fixes deep beeps on Intel Advanced/ATX. 2021-06-06 23:56:21 +02:00
Miran Grča
117aa80f2d Merge pull request #1478 from 86Box/tc1995
Fixed 256 color modes in the Oak OTI, made the New MMIO-capable S3 cards behave like the ViRGE and fixed some modes in the 868/968 in recalctimings
2021-06-05 23:37:52 +02:00
TC1995
c3c8da49db Removed log excess. 2021-06-05 20:52:10 +02:00
TC1995
76271ddd08 Fixed 256 color modes in the Oak OTI cards.
Made the New MMIO-capable S3 cards behave like the ViRGE for the double word/packed chain-4 addressing.
2021-06-05 20:50:38 +02:00
OBattler
b4d35af149 ICS 53xx/GENDAC/SDAC RAMDAC fixes. 2021-06-05 20:24:51 +02:00
OBattler
f870f3439c Fixed the Shuttle HOT-539 segmentation fault. 2021-06-04 02:46:41 +02:00
OBattler
eef77b7c86 Added a way to force legacy mode as a temporary fix for the Voodoo Banshee/3 until there's a proper fix. 2021-06-04 02:41:13 +02:00
OBattler
9161f9a071 Slight fix. 2021-06-03 23:54:12 +02:00
OBattler
e240342c4b Implemented packed Chain 4 support on the Voodoo Banshee and 3. 2021-06-03 23:18:43 +02:00
OBattler
368c92780a Added a version of the Winbond W83787F Super I/O chip with IDE enabled by default, fixes IDE on the Flytech 386. 2021-06-03 23:15:34 +02:00
Miran Grča
2f761da6fb Merge pull request #1470 from richardg867/feature/cs423x
Game port overhaul, Crystal CS423xB and other changes
2021-06-03 22:44:48 +02:00
RichardG867
15888eeff8 Add snd_cs423x.c to CMake list 2021-06-03 17:40:54 -03:00
RichardG867
dc4906a23f Fix ISAPnP logical devices going missing 2021-06-03 17:30:50 -03:00
RichardG867
2b692640e1 Disable ISAPnP logging 2021-06-03 16:26:09 -03:00
RichardG867
62afe31757 Remove EBGA368 due to poor research (CPUs are Samuel 2 and newer only) 2021-06-03 16:26:08 -03:00
RichardG867
5cd255a0e0 Fix CS4236 codec remapped register reads 2021-06-03 16:26:08 -03:00
RichardG867
9159815823 CS423x: Implement internal FM control and analog power down 2021-06-03 16:26:08 -03:00
RichardG867
ff46734e5e Preserve logical device configuration on ISAPnP ROM update 2021-06-03 16:26:08 -03:00
RichardG867
ea3d844826 Add missing NULL check to CS423x game port. 2021-06-03 16:26:08 -03:00
RichardG867
ce7db25d7c Add hidden CS4237B and CS4238B devices 2021-06-03 16:26:07 -03:00
RichardG867
dfd6d4e2df Add game port device with 6 I/O ports for the Crystal CS4237/8B 2021-06-03 16:26:07 -03:00
RichardG867
80fb5775e4 LM78 no longer needs to be a PCI device with the TRC change 2021-06-03 16:26:07 -03:00
RichardG867
b5a295e91d Continuing the game port overhaul: added support for Super I/O game ports not being broken out 2021-06-03 16:26:07 -03:00
RichardG867
82a3861805 Make PCI TRC reset all devices 2021-06-03 16:26:06 -03:00
RichardG867
ff4f0ee59e Crystal CS4236, part 5: Windows 9x now works 2021-06-03 16:26:06 -03:00
RichardG867
19d2bda4ce Confirm P2B-LS onboard SCSI and LAN slot numbers (props to computerguy08 on Discord) 2021-06-03 16:26:06 -03:00
RichardG867
18289a9a64 Crystal CS4236, part 4: the one that took two days 2021-06-03 16:26:06 -03:00
RichardG867
8b9b6c885d Minor formatting cleanups 2021-06-03 16:26:06 -03:00
RichardG867
c8c4aac167 ISAPnP tweaks: allow initialization with a null ROM; disable fatals for bad resource data; only change state on enable/disable if a change occurred. 2021-06-03 16:26:05 -03:00