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Author SHA1 Message Date
RichardG867
8536f93dfc Merge branch 'master' of https://github.com/86Box/86Box 
# Conflicts:
#	src/cpu/cpu.c
 2020-07-06 19:00:31 -03:00
Miran Grča
d3575d6194 Merge pull request #904 from nerd73/master 
Fix issues with Cyrix DX2/DX4 CPUs and restore Cyrix 6x86 for dev-branch builds
 2020-07-06 23:52:15 +02:00
RichardG867
c1dd844747 Merge branch 'master' of https://github.com/86Box/86Box 
# Conflicts:
#	src/machine/machine_table.c
#	src/win/Makefile.mingw
 2020-07-06 18:47:50 -03:00
RichardG867
11114c97d2 Initial implementation of STPC chipsets and machines 2020-07-06 18:45:34 -03:00
David Hrdlička
82f2b203c5 More MSVC build fixes 
Ported an inline assembler snippet in x86 new dynarec to MSVC "__asm" syntax.
 2020-07-06 21:03:55 +02:00
nerd73
18368203ec Fix issues with Cyrix DX2/DX4 CPUs 
Fix some issues with the Cyrix DX2 & DX4 CPUs and restore the Cyrix 6x86 for dev-branch builds.
 2020-07-06 13:01:52 -06:00
David Hrdlička
254c8024f8 Fix MSVC build 2020-07-06 20:20:07 +02:00
OBattler
572314706c Paradise PVGA1A now also uses paradise_recalctimings. 2020-07-05 03:41:44 +02:00
OBattler
db12ba4e91 Attempt at fixing the Paradise VGA 640x480x8bpp mode in Windows 3.0. 2020-07-05 02:57:15 +02:00
TC1995
bef93a81b3 Merge branch 'master' of github.com:86Box/86Box into tc1995 2020-07-03 21:40:50 +02:00
Miran Grča
b5d02a8039 Merge pull request #894 from nerd73/opti291 
Add an OPTi 291-based Award v4.20 machine
 2020-07-03 15:31:48 +02:00
TC1995
f8870d421e Merge branch 'master' of github.com:86Box/86Box into tc1995 2020-07-03 12:44:11 +02:00
nerd73
2b06dbc10b Merge branch 'opti291' of https://github.com/nerd73/86Box into opti291 2020-07-03 03:09:48 -06:00
nerd73
ff000b53cc actually make it work this time 2020-07-03 03:09:09 -06:00
nerd73
6a9fa51d78 fix header 2020-07-03 00:24:48 -06:00
nerd73
5b260dbfd4 Add a 386SX Award v4.20 machine 
As well as a basic implementation of the OPTi 291 chipset that it uses.
 2020-07-03 00:18:16 -06:00
Miran Grča
03932a329f Merge pull request #889 from tiseno100/master 
Added the RYC Leopard LX
 2020-07-03 04:41:05 +02:00
Miran Grča
989aec54ef Merge pull request #893 from nerd73/master 
Fix MSRs on the IBM 386/486 CPUs
 2020-07-03 04:40:51 +02:00
nerd73
064acae3fc Fix MSRs on the IBM 386/486 CPUs 
Also give the IBM 386SLC 'isibm486' as it is believed to identify as a 486 to software.
 2020-07-02 20:34:18 -06:00
richardg867
6f1a7f8c65 Merge pull request #892 from richardg867/master 
Disable GL518SM logging
 2020-07-02 23:26:57 -03:00
RichardG867
042f743a35 Disable GL518SM logging 2020-07-02 23:26:04 -03:00
OBattler
02c43a1be6 Some CL-GD 54xx fixes. 2020-07-03 03:25:46 +02:00
Miran Grča
2b8bec3fc7 Merge pull request #891 from richardg867/master 
Genesys Logic GL518SM hardware monitor
 2020-07-03 03:08:05 +02:00
RichardG867
aec8285849 Undo local changes to m_at_socket370.c 2020-07-02 21:45:46 -03:00
RichardG867
f809bf6502 Undo local changes to serial.c 2020-07-02 21:45:00 -03:00
RichardG867
f565362a41 Undo local changes to cpu.c 2020-07-02 21:44:28 -03:00
RichardG867
5d5883ac0d Merge branch 'master' of https://github.com/86Box/86Box 2020-07-02 21:42:52 -03:00
RichardG867
b043f1867b Genesys Logic GL518SM hardware monitor 2020-07-02 21:42:31 -03:00
tiseno100
525a6f0278 Added the RYC Leopard LX 
An interesting kind of 386DXish/486 kind of board. Uses the IBM 486SLC(only!) which is commonly found in PS/2 & PS/1 286 & 386 computers as an "upgrade" chip
 2020-07-02 22:10:36 +03:00
Miran Grča
d5e5c88f97 Merge pull request #888 from nerd73/master 
Implement IBM 486 MSRs
 2020-07-02 18:49:04 +02:00
nerd73
a9e0dd247a Implement IBM 486 MSRs 
Implement the MSRs supported by the IBM 386SLC/486SLC/486BL.
 2020-07-02 10:09:55 -06:00
OBattler
808fa292f6 Fixed memory state for PS/2 split mapping on models 70 and 80 (broken by recent mem.c changes). 2020-07-02 00:21:46 +02:00
Miran Grča
8ebcfe766e Merge pull request #883 from amdk6/master 
Added various Dell machines
 2020-06-30 15:56:41 +02:00
Miran Grča
56098700d1 Merge pull request #882 from nerd73/pythonfix 
Implement C0000-DFFFF shadowing on the OPTi 5x7 chipset
 2020-06-30 15:56:29 +02:00
OBattler
602cadf863 Removed the fdc_at_device adding from the PS/1 Model 2133, as the FDC is now correctly added by the Super I/O chip. 2020-06-30 15:52:47 +02:00
OBattler
33a0cf53c4 Removed the "PS/1 Model 2133" Super I/O chip as it has been identified as a National Semiconductors PC87332 on a different set of ports, the PS/1 Model 2133 now uses that. 2020-06-30 15:49:47 +02:00
OBattler
81d178e9f6 Rewrote the VLSI 82C480 chipset emuluation and gave the PS/1 Model 2133 its Super I/O chip. 2020-06-30 15:37:07 +02:00
Gey Cunt
57d7982a53 Added various Dell machines 2020-06-30 16:15:48 +03:00
nerd73
546f0a83e7 Implement C0000-DFFFF shadowing on the OPTi 5x7 chipset 2020-06-29 22:06:27 -06:00
OBattler
13e8d9c923 Fixed Shadow RAM handling for all OPTi 486 chipsets. 2020-06-30 03:24:06 +02:00
OBattler
9402f98a3b Rewrote the OPTi 82C495 emulation, added the OPTi 82C493, did some changes to the 82C8xx, and updated Makefile.local. 2020-06-30 00:34:49 +02:00
OBattler
a4301708da Added the OPTi 802G device (the 802G and 895 are register-identical), and added port 23h to the OPTi 8xx'es. 2020-06-29 18:44:20 +02:00
OBattler
4a8aa601b6 Fixed (and improved) the OPTi 895 chipset implementation. 2020-06-29 18:13:14 +02:00
Miran Grča
e4954193c8 Merge pull request #881 from tiseno100/master 
Implemented the OPTi 82C895 chipset
 2020-06-29 16:06:11 +02:00
tiseno100
672b0bbef7 Deleted the Acer off the Makefile 
It's not needed anymore.
 2020-06-29 16:39:30 +03:00
tiseno100
cd840c4c02 Added the OPTi 895 in Makefile 2020-06-29 16:38:26 +03:00
tiseno100
0b17c4ef31 Fixed a small inconsistency 2020-06-29 16:28:22 +03:00
tiseno100
388825377c Implemented the OPTi 895 
Similar the OPTi 495 & 802G. It's a 486 ISA/VLB chipset used by many known boards. One being the PB450.
 2020-06-29 16:26:18 +03:00
OBattler
5c1f947122 The VLSI VL82C480 chipset now has Port 92h, fixes the IBM PS/1 model 2133. 2020-06-29 14:33:12 +02:00
OBattler
014552f235 Fixes to SiS 496/497 and W83787F. 2020-06-29 04:32:30 +02:00