Commit Graph

12262 Commits

Author SHA1 Message Date
Miran Grča
c99c4ecb6e Merge pull request #4134 from 86Box/tc1995
Fix SVGA code warnings.
2024-02-07 23:14:25 +01:00
Cacodemon345
395941aa54 HWCursor work 2024-02-08 02:07:49 +06:00
TC1995
ca11dae903 Fix SVGA code warnings.
See above.
2024-02-07 20:56:25 +01:00
OBattler
89cc2a3956 NEC CD-ROM: Make command DAh not also set speed. 2024-02-07 20:45:45 +01:00
Cacodemon345
5ce8b9e1a1 24-bpp image blit fixes 2024-02-08 00:34:29 +06:00
Miran Grča
c538a726c7 Merge pull request #4119 from lemondrops/feature/cpuid_and_msr
CPUID and MSR fixes and improvements
2024-02-07 19:21:19 +01:00
Alexander Babikov
996769095b Implement most missing P6 MSRs
Remove the 6 extraneous performance counter MSRs which
haven't existed on P6
2024-02-07 12:31:43 +05:00
Alexander Babikov
e54b57641c Implement missing IBM, AMD and Cyrix MSRs 2024-02-07 12:31:42 +05:00
Alexander Babikov
65f40ca71d Implement missing WinChip C6/2 and Cyrix III MSRs 2024-02-07 12:31:42 +05:00
Alexander Babikov
1b9bf568f2 Implement missing Pentium MSRs
Includes obscure behavior, like undocumented "high" MSRs
2024-02-07 12:31:41 +05:00
Alexander Babikov
8143ccdc9b K5 reorganization
Rename SSA/5 to Model 0 and 5k86 to Model 1/2/3 and swap their ordering
Remove the Model 0 CPUs from the Model 1 (5k86) table
2024-02-07 12:31:40 +05:00
Alexander Babikov
8520e6be85 Show actual clocks for CPUs w/ Performance Ratings 2024-02-07 12:31:40 +05:00
Alexander Babikov
2a3d13d306 Various consistency changes 2024-02-07 12:31:39 +05:00
Alexander Babikov
1e4455d98c Add comments with MSR and CPUID flag names
Reorganize the MSR struct
2024-02-07 12:31:38 +05:00
Alexander Babikov
b860156350 Remove an accidentally committed duplicate file 2024-02-07 12:31:38 +05:00
Alexander Babikov
1bb31f3937 Remove the AP61 hack completely
It's no longer needed
2024-02-07 12:31:37 +05:00
Alexander Babikov
963525ff2e Correct the CPUID SEP bit on AMD K6-2 and later
They use the standard bit 11, not he AMD-specific bit 10
2024-02-07 12:31:37 +05:00
Alexander Babikov
aef257378e Add PGE to AMD K5 and K6-2C/III/2+/III+ 2024-02-07 12:31:36 +05:00
Alexander Babikov
37cf0b6845 Separate Pentium and Cx6x86 MSR handling 2024-02-07 12:31:35 +05:00
Alexander Babikov
a1540eee92 Remove the machine check CPUID flag from the P24T 2024-02-07 12:31:35 +05:00
Alexander Babikov
032a161c4a Implement IDT/VIA FCR2 CPUID family/model spoofing 2024-02-07 12:31:34 +05:00
Alexander Babikov
2da7b196ac Rename unnamed MSR vars to real names where known 2024-02-07 12:31:34 +05:00
Miran Grča
17afc7267c Merge pull request #4131 from 86Box/tc1995
Mach64 temporary updates:
2024-02-07 03:07:20 +01:00
TC1995
f8647f07a3 Mach64 temporary updates:
Temporarily replace the ATI68860 8bpp renderer with a clone one while the current renderer (8bpp) is being fixed for proper colors on the Mach64.
2024-02-07 03:06:19 +01:00
Miran Grča
48fa9ba95a Merge pull request #4130 from 86Box/tc1995
Couple of changes in the video side.
2024-02-07 02:54:11 +01:00
TC1995
7198b78069 Couple of changes in the video side.
1. Second attempt to fix the banking in the Cirrus (sigh, why doesn't banking get nulled automatically...)
2. Introduce a new timer to the 8514/A side so it won't slow the VGA clock down it was shared before.
2024-02-07 01:53:16 +01:00
OBattler
f3d585a1e1 Fix horizontal blanking calculation, fixes some S3 blanking excesses. 2024-02-07 00:11:02 +01:00
OBattler
d8d44efab2 Merge branch 'master' of https://github.com/86Box/86Box 2024-02-07 00:02:27 +01:00
Miran Grča
ef01e27d31 Merge pull request #4129 from 86Box/tc1995
9001st update on Cirrus banking...
2024-02-06 23:58:10 +01:00
TC1995
30e768955c 9001st update on Cirrus banking...
1. VRAM mask consistency...
2. Don't apply the IBM VGA mode check to linear functions, where banking isn't used at all.
2024-02-06 23:50:32 +01:00
OBattler
1b5ac0f68a TVP3026: Correctly apply the RAMDAC multiplex mode. 2024-02-06 23:35:43 +01:00
Miran Grča
9b63f971cc Merge pull request #4128 from 86Box/tc1995
Update on Cirrus banking.
2024-02-06 22:58:15 +01:00
TC1995
e0aa4db151 Update on Cirrus banking.
When I say banking should be 0 when IBM VGA modes are set, they must be, Cirrus...
Also, updated the vram mask using the gd54xx struct rather than svga's for consistency.
2024-02-06 22:44:58 +01:00
TC1995
cb4f0fe85a Revert "HDISP updates on S3 968 cards."
This reverts commit e648af9a71.
2024-02-06 22:41:59 +01:00
TC1995
e648af9a71 HDISP updates on S3 968 cards.
Attempt at fixing the half horizontal display bugs in the best possible way without affecting the vendor drivers (which don't enable bit 6 of gdcreg5 for 256 colors and greater but generic non-vendor specific drivers do).
2024-02-06 21:40:26 +01:00
Miran Grča
86c63973bc Merge pull request #4126 from 86Box/tc1995
Radius Video7 ISA card update about the I/O handler.
2024-02-06 21:37:14 +01:00
TC1995
792485f48f Radius Video7 ISA card update about the I/O handler.
Don't touch the POS I/O ports at all, fixes hang ups with the card in question using the IBM PS/1 machines, which rely on those ports.
2024-02-06 21:34:00 +01:00
Miran Grča
2acb61a067 Merge pull request #4125 from 86Box/tc1995
SVGA video card fixes of the day.
2024-02-06 21:31:12 +01:00
TC1995
9926e1ff6a SVGA video card fixes of the day.
Vendor banking should be 0 when plain IBM VGA modes are set, fixes corrupt text modes (Cirrus and Paradise at the moment).
2024-02-06 21:26:23 +01:00
Miran Grča
9a272105e7 Merge pull request #4124 from 86Box/tc1995
SCSI CD-ROM fixes of the day.
2024-02-06 21:20:00 +01:00
TC1995
0d88e8394c SCSI CD-ROM fixes of the day.
1.Re-implemented in the best way possible the muted part of the Toshiba/NEC Play Audio commands and related, per spec.
2. Forgot to add a check to a Sony Vendor Data Out command  when the len is 0 it should become a Status command, fixes emulator crashes when len is 0 using some CD software.
2024-02-06 21:18:25 +01:00
Miran Grča
681128fc9c Merge pull request #4123 from 86Box/tc1995
More fixes to the 5380-based core.
2024-02-06 21:10:51 +01:00
TC1995
ad9503ec28 More fixes to the 5380-based core.
More timer related fixes regarding the speed combinations, looking at you, Rancho (8.10R and 8.20R), but at least it should solve most problems with boots.
2024-02-06 21:09:38 +01:00
OBattler
bf85d8088b Fixed the registers collision between SiS 496/497 and Cyrix registers, which fixes the 4SAW2 on Cyrix CPU's, and removed the block on those CPU's for that machine. 2024-02-06 21:01:11 +01:00
Cacodemon345
1808498370 Add note about bytes_skip calculation 2024-02-07 01:40:15 +06:00
Cacodemon345
df91185e75 Minor line fix 2024-02-07 01:32:46 +06:00
Cacodemon345
614241b8b2 Non-CPU-driven monochrome source blits 2024-02-07 01:25:54 +06:00
Cacodemon345
cd03088873 Source offset trouble fixed
WIP hardware cursor
2024-02-07 00:51:17 +06:00
OBattler
ecd90616f1 Removed an unnecessary CPU operations table. 2024-02-06 19:51:02 +01:00
OBattler
cbf1749a25 Fixed the reported CPU inacuracies, closes #4121. 2024-02-06 19:50:21 +01:00